VHDL Simulation Stopping by itself

Question

I dont get this, simulation just stops after "taster" signal becomes "1", no idea why. In Xilinx IDE package testbench.

entity komb is
    Port ( reset : in  STD_LOGIC;
           clk : in  STD_LOGIC;
           levo_ndesno : in  STD_LOGIC;
           dogadjaj : in  STD_LOGIC;
           taster : in  STD_LOGIC;
           tr_cifra : out  STD_LOGIC_VECTOR (3 downto 0);
           cifra : out  STD_LOGIC_VECTOR (6 downto 0);
           otvori : out  STD_LOGIC;
           greska : out  STD_LOGIC);
end komb;

architecture Behavioral of komb is

type tab is array(0 to 9) of std_logic_vector(6 downto 0);
signal tabela_cifara : tab;

type niz is array(0 to 3) of integer;
signal sifra : niz;
signal tr_sif : niz;

type state_type is (s12, s11, s10, s9, s8, s7, s6, s5, s4, s3, s2, s1, s0);
signal state_reg, next_state : state_type;

signal cnt_cif : integer;


constant fclk : integer := 1;
constant jedna_sekunda : integer := 10*fclk;
signal counter : integer;

begin

sifra(3) <= 3;
sifra(2) <= 5;
sifra(1) <= 9;
sifra(0) <= 2;

state_transition: process(clk, reset)
begin
    if (reset = '1') then
        state_reg <= s0;
    elsif (clk'event and clk = '1') then
        state_reg <= next_state;
    end if;
end process;

counter_process : process(clk, reset, state_reg, counter)
begin
    if (reset = '1') then 
        counter <= jedna_sekunda;
    else
        if(clk'event and clk='1') then
            if (state_reg = s12) then
                if (counter = 0) then
                    counter <= jedna_sekunda;
                else
                    counter <= counter - 1;
                end if;
            end if;
        end if;
    end if;     
end process;

next_state_logic: process(state_reg, dogadjaj, taster, cnt_cif, levo_ndesno, counter)
begin
    case state_reg is
        when s0 =>
                if (dogadjaj = '0') then
                    next_state <= s0;
                else
                    next_state <= s1;
                end if;

        when s1 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s2;
                else
                    next_state <= s3;
                end if;
            end if;

        when s2 => 
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s4;
                else 
                    next_state <= s1;
                end if;
            end if;

        when s3 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s1;
                else 
                    next_state <= s5;
                end if;
            end if;

        when s4 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if(levo_ndesno = '1') then
                    next_state <= s6;
                else 
                    next_state <= s2;
                end if;
            end if;

        when s5 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if(levo_ndesno = '1') then
                    next_state <= s3;
                else 
                    next_state <= s7;
                end if;
            end if;

        when s6 => 
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s8;
                else 
                    next_state <= s4;
                end if;
            end if;

        when s7 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s5;
                else
                    next_state <= s9;
                end if;
            end if;

        when s8 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s10;
                else
                    next_state <= s6;
                end if;
            end if;

        when s9 => 
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s7;
                else
                    next_state <= s10;
                end if;
            end if;

        when s10 =>
            if (taster = '1') then
                next_state <= s11;
            else
                if (levo_ndesno = '1') then
                    next_state <= s9;
                else 
                    next_state <= s8;
                end if;
            end if;

        when s11 =>
            if (cnt_cif < 4) then
                next_state <= s1;
            else
                next_state <= s12;
            end if;

        when s12 =>
            if (counter = 0) then
                next_state <= s0;
            else
                next_state <= s12;
            end if;
    end case;       
end process;

output_logic: process(state_reg, cnt_cif, tabela_cifara)
variable xxcif : integer;
begin
        case state_reg is
            when s0 =>
                cifra <= tabela_cifara(0);
                cnt_cif <= 1;
                otvori <= '0';
                greska <= '0';
                tr_cifra <= "0001";
                tr_sif(0) <= 0;
                tr_sif(1) <= 0;
                tr_sif(2) <= 0;
                tr_sif(3) <= 0;

            when s1 =>
                cifra <= tabela_cifara(0);
                xxcif := 0;
                case cnt_cif is
                    when 1 =>
                        tr_cifra <= "0001";
                    when 2 =>
                        tr_cifra <= "0011";
                    when 3 =>
                        tr_cifra <= "0111";
                    when 4 =>
                        tr_cifra <= "1111";
                    when others =>
                        tr_cifra <= "0000";
                end case;

            when s2 =>
                cifra <= tabela_cifara(9);
                xxcif := 9;

            when s3 =>
                cifra <= tabela_cifara(1);
                xxcif := 1;

            when s4 =>
                cifra <= tabela_cifara(8);
                xxcif := 8;

            when s5 =>
                cifra <= tabela_cifara(2);
                xxcif := 2;

            when s6 =>
                cifra <= tabela_cifara(7);
                xxcif := 7;

            when s7 =>
                cifra <= tabela_cifara(3);
                xxcif := 3;

            when s8 =>
                cifra <= tabela_cifara(6);
                xxcif := 6;

            when s9 =>
                cifra <= tabela_cifara(4);
                xxcif := 4;

            when s10 =>
                cifra <= tabela_cifara(5);
                xxcif := 5;

            when s11 =>
                tr_sif(cnt_cif-1) <= xxcif;
                cnt_cif <= cnt_cif + 1;

            when s12 =>
                cifra <= tabela_cifara(0);
                if ((tr_sif(0) = sifra(0)) and (tr_sif(1) = sifra(1)) and (tr_sif(2) = sifra(2)) and (tr_sif(3) = sifra(3))) then
                    otvori <= '1';
                else
                    greska <= '1';
                end if;

        end case;                       
end process;

tabela_cifara(0) <= "1111110";
tabela_cifara(1) <= "0110000";
tabela_cifara(2) <= "1101101";
tabela_cifara(3) <= "1111001";
tabela_cifara(4) <= "0110011";
tabela_cifara(5) <= "1011011";
tabela_cifara(6) <= "1011111";
tabela_cifara(7) <= "1110000";
tabela_cifara(8) <= "1111111";
tabela_cifara(9) <= "1111011";


end Behavioral;

Here's my simple test bench program:

stim_proc: process
   begin        
      -- hold reset state for 100 ns.
      reset <= '1';

        wait for 10 ns; 

        reset <= '0';

      wait for 10 ns;

      -- insert stimulus here 
        dogadjaj <= '1';
        wait for clk_period;
        dogadjaj <= '0';
        wait for 10 ns;
        levo_ndesno <= '1';

        wait for 100ns;
        taster <= '1';
        wait for 10ns;
        --taster <= '0';

      wait for 200ns;
   end process;

Please help :)

Answer 1

I found the problem!

In the combinational process output logic I have the line cnt_cif <= cnt_cif + 1, which isn't clocked, so when the process gets into s11 state, it infinitely executes the above line and breaks.

Thanks for help @rick @Brian Drummond. :)