Why is there no output from the verilog test bench?

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I have coded a module that detects when either an X-axis pin (pins 1- 25) or Y-axis pins (pins 26-50) go high. The code runs without error; however, the testbench outputs nothing. Here's the code:

`timescale 1ns / 1ps // Setting timescale to 1 ns

module PinCoordinates(
    input wire [49:0] pins,           // 50 pins input
    output reg [4:0] x_coordinate,    // Output X coordinate pins (1-25)
    output reg [4:0] y_coordinate,    // Output Y coordinate pins (26-50)
    output reg output_valid           // Output indicating valid coordinates
);

integer i;
reg x_detected, y_detected; // Flags to indicate detection of X and Y coordinates

always @* begin
    // Reset detection flags at the beginning of each evaluation
    x_detected = 1'b0;
    y_detected = 1'b0;
    output_valid = 1'b0;

    // Check for high X coordinate
    for (i = 0; i < 25; i = i + 1) begin
        if (pins[i] == 1'b1) begin
            x_coordinate = i + 1; // X coordinate pin numbering starts from 1
            x_detected = 1'b1;    // Set X coordinate detection flag
         
        end
    end
    
    // Check for high Y coordinate
    for (i = 25; i < 50; i = i + 1) begin
        if (pins[i] == 1'b1) begin
            y_coordinate = i - 24; // Y coordinate pin numbering starts from 26
            y_detected = 1'b1;     // Set Y coordinate detection flag
            
        end
    end
    
    // Output is valid only if both X and Y coordinates are detected
    if (x_detected && y_detected) begin
        output_valid = 1'b1;
    end
end

endmodule

Heres the testbench:

`timescale 1ns / 1ps // Setting timescale to 1 ns

module PinCoordinates_tb;

    // Parameters
    parameter CLOCK_PERIOD = 10; // Clock period in time units
    parameter SIM_TIME = 2000;   // Simulation time in time units
    
    // Signals
    reg [49:0] pins;
    reg clk;
    wire [4:0] x_coordinate;
    wire [4:0] y_coordinate;
    wire output_valid;
    
    // Instantiate the module under test
    PinCoordinates dut (
        .pins(pins),
        .x_coordinate(x_coordinate),
        .y_coordinate(y_coordinate),
        .output_valid(output_valid)
    );
    
    // Clock generation
    always #CLOCK_PERIOD clk = ~clk;
    
    // Stimulus generation
    initial begin
        // Test 1: All pins are low
        pins = 50'b0;
        #100; // Wait for a few clock cycles
        
        // Test 2: Only X coordinates are high
        pins = 50'b0;
        pins[0] = 1; // Set X coordinate pin 1 high
        #100; // Wait for a few clock cycles
        
        // Test 3: Only Y coordinates are high
        pins = 50'b0;
        pins[25] = 1; // Set Y coordinate pin 26 high
        #100; // Wait for a few clock cycles
        
        // Test 4: Both X and Y coordinates are high
        pins = 50'b0;
        pins[0] = 1; // Set X coordinate pin 1 high
        pins[25] = 1; // Set Y coordinate pin 26 high
        #100; // Wait for a few clock cycles
        
        // Stop simulation a
        #SIM_TIME $finish;
    end
    
    // Monitor
    always @(posedge clk) begin
        $display("Time: %t, X Coordinate: %d, Y Coordinate: %d, Output Valid: %b", $time, x_coordinate, y_coordinate, output_valid);
    end

endmodule

I am expecting the testbench to output the X-Y Coordinates and whether the data is valid, but alas, i get nothing when using EDA Playground testing space.It was functional when on an FPGA yesterday. Is anyone able to spot an error in either the design module or the test bench? Thanks

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