I have some cover groups in my testbench driver. I want to generate a coverage results file, not ucm type but ASCII type, so I can feed it to a spreadsheet or Python.
I work with the Cadence Xcelium simulator. Is there a way to do it?
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Refer to the Cadence documentation. You can read in the coverage database then use the
reportcommand with the-textoption to output a coverage report file in plain text format.Alternately, you can use the
covergroupget_inst_coverageandget_coveragemethods in your Verilog source code files along with$displayto output the coverage results to the simulation log file. Refer to IEEE Std 1800-2017, section 19.8 Predefined coverage methods. The advantage to this approach is that it works with any simulator.