In PCIe, Enhanced Configuration Access Mechanism (ECAM) is used to read/write Configuration Space.
Memory map consists of base address, BDF values, Register Number.
However, during enumeration, CPU do not know about the BDF of PCIe endpoint. (After enumeration, CPU assigns BDF for all PCIe endpoint. Am I right?)
In enumeration, CPU sends configuration read for getting Vendor ID.
Then, how to request configuration read to PCIe endpoint? Since CPU does not assign BDF yet, there is no memory map between configuration space of PCIe endpoint.
In this case, does CPU use legacy configuration mechanism (IO write and IO read)? ARM CPU does not have IO map. Then, how does it request configuration read?
I want to know the mechanism with the view of TLP packet.