PCIe MSI Interrupts directly into Userspace with VFIO & IOMMU

Question

I am currently writing a userspace driver to interface with an Altera PCIe card. My goal is to reduce max interrupt latency as much as possible.

I am currently using VFIO_DEVICE_SET_IRQS ioctl to register an MSI interrupt with an Eventfd, then read to wait on it.

If my understanding is correct, this will syscall into the kernel and waits. When the Board sends the MSI, the APIC will signal the correct IRQ which should jump to kernel code and signals the kernel to schedule the userpsace process to return from the read.

Is it possible to configure the system such that i halt the CPU core from the userspace process and the MSI is handled by that same CPU core, and continues execution or call a "handler"? Without going into the kernel and waiting on a select, poll or read.

I think something similar is possible with Intel posted interrupts, but i am not sure how to enable it with VFIO.

There is a mailing list [1] and other similar patches, but i can't find them in kernel source.

[1] https://lore.kernel.org/lkml/[email protected]/T/#meba921c9eb430ec8c07d5828e1c9c625671dbd8d

Answer 1

you need to have kernel version at least 4.8 and QEMU version should be that support it like 2.6 and then you also need to enable some settings like enabling posted option in QEMU command line while assigning the device to guest mode

example:

-device vfio-pci,host=01:00.0,x-intx-mmap=true, posted =true

this will create posted interrupt descriptor table for device and map it to the guest memory

kindly check out this link for more info or reference https://www.reddit.com/r/VFIO/comments/yd00x1/handling_interrupts_in_vfio/?rdt=40262