How to initialize a AltiVec register from scalars without using compound literals

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I have some code like this

void op(uint32_t B0, uint32_t B1, uint32_t B2, uint32_t B3)
{
   auto v = (__vector unsigned int){B0, B1, B2, B3};
   ...
}

When I compile it, GCC warns that "ISO C++ forbids compound-literals". Is there any other way to initialize an AltiVec __vector from multiple scalars without this construct? Or should I just ignore the warning.

I found some IBM documentation that indicated (__vector unsigned int)(B[0], B[1], B[2], B[3]) (note parens instead of brackets) would work, but GCC rejects this.

The only other thing I can think of is to first place the four scalars into an array and then load it from memory. However that seems like it would be rather slower. I'm basically looking for the equivalent of SSE2's _mm_set_epi32 intrinsic.

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Paul R On

There were two different syntaxes for this back in olden times, both of which might be worth a try:

__vector unsigned int v = (__vector unsigned int){ B0, B1, B2, B3 }; // gcc syntax

and

__vector unsigned int v = (__vector unsigned int)(B0, B1, B2, B3); // Motorola syntax

It looks like you already tried the “gcc” syntax (apart from the use of auto), but maybe the Motorola syntax might work ?

The only other suggestion I can make if the Motorola syntax does not work is to try using the gcc syntax but compile it as C rather than C++, since there may now be some conflict between C++11 and the gcc-style AltiVec initialisers.