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20 TechQA 2024-02-21T19:38:09.037000Run AVX SIMD instruction in VScode on Windows with a WSL
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Asked by markus
What does this PPC assembly listing do, using lwz from 0(r12) and 4(r12) before a BCTR indirect jump?
147 views
Asked by void_17
How to add an immediate to a VSX register in open power ISA?
93 views
Asked by shb8086
Altivec vec_all_gt equivalent on arm neon
110 views
Asked by sunmoon
Compilation error using AltiVec SIMD vector type in C++
222 views
Asked by ympolo
SIMD extensions on power: compiler flags and processor support
480 views
Asked by Denis Yaroshevskiy
Check that at least 1 element is true in each of multiple vectors of compare results - horizontal OR then AND
754 views
Asked by Michael IV
Error: matching constraint not valid in output operand
826 views
Asked by jww
Clang equivalent of GCC's __builtin_darn()
237 views
Asked by jww
Error: operand out of range (64 is not between 0 and 31)
1.7k views
Asked by jww
will 32-bit altivec code work on 64-bit machine
90 views
Asked by shok
"-qaltivec" is not compatible with "-qarch=pwr5"
136 views
Asked by jww
How to initialize a AltiVec register from scalars without using compound literals
152 views
Asked by Jack Lloyd
Why doesn't the compiler fold xxswapd and vperm?
169 views
Asked by jww
Double-word vector rotates on old Altivec's without 64-bit data type
101 views
Asked by jww
What is the availability of 'vector long long'?
350 views
Asked by jww
Does IBM XL/C signal Altivec support in the preprocessor?
163 views
Asked by jww
Is vec_sld endian sensitive?
2.9k views
Asked by jww
How to print a vector variable as its 128-bit vsx value?
442 views
Asked by jww
Power8 vsldoi built-in or replacement
141 views
Asked by jww