Why are name dependencies (WaR, WaW) in ILP architectures problematic?

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Assume the following two instructions are executed simultaneously:

addi $t0, $t1, 4
addi $t1, $t2, 4

It's an anti-dependence, or Write-after-Read. Assuming they are executed at the same time, wouldn't the first instruction still read the correct value before the second instruction writes back to $t1?

As for an output dependence, or Write-after-Write:

addi $t0, $t1, 4
addi $t0, $t2, 4

I can see why this is problematic, I can't imagine who would "win", if any. I mean we're speaking Instruction Level Parallelism, so theoretically I suppose there'd be a NOP before the second instruction can write to $t0? In which case I only see a problem if another instruction wants to read from $t0 before the second instruction writes to it again, and of course the "lost" cycle.

So really, my question is: why is Write-after-Read problematic? Is it because during the instruction decode, different addresses might be loaded into $t1?

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