What does Z in Verilog stand for?

Question

I've recently found a code like this in a Verilog code that I'm referring to write finite state machine.

reg [15:0]Bus;
Bus = 'bzzzzzzzzzzzz1111;

What is the meaning of z here?

Answer 1

From the IEEE Std 1800-2012, section "6.3.1 Logic values":

z—represents a high-impedance state

The SystemVerilog value set consists of the following four basic values:

0—represents a logic zero or a false condition
1—represents a logic one or a true condition
x—represents an unknown logic value
z—represents a high-impedance state

The values 0 and 1 are logical complements of one another.

Answer 2

Z represents a high impedance state, but why would you want that?

It basically means that you aren't driving the output of the bus, so that something else can drive it.

You're most likely to use this when driving the output ports of your device, say the FPGA is comunicating with another chip with the I2C protocol, you send your read request, then drive Z on the bus to allow the device to respond with the data you requested