The execution process of the instruction and the realization in gem5?

Question

I am learning the running process of the program on gem5. And read some books. But I am still confused about the parts in the program execution. Is my understanding below correct?

1. First, the computer instruction is placed in the ICache, and the computer CPU controls the fetching of instructions, and puts the fetched instructions into the instruction queue. Then take the instruction from the instruction queue and decode the instruction into micro-operations. These micro operations will be sent to the reorder-buffer. If the micro operation in the reorder buffer is a load/store, it will be sent to the load/store queue. If it is an operation such as addition and subtraction, it will be sent directly to the execution unit. In this process, each execution unit has a reserved station for register rename. When the micro operation is completed, it will return to the reorder buffer. When the micro operation reaches the head of the reorder buffer, it can be written back to the Cache or memory outside the CPU.
2. The load queue will fetch data from the cache. The cache is generally a virtual address index and a physical address tag. The load operation will fetch from the Cache in parallel and perform virtual address translation. If the Cache misses, the load operation will be sent to MSHR. MSHR sends the fetched data to the memory. If the data is in the memory, the data is fetched into the Cache first, and then the fetched data is returned to the MSHR, and then returned to the load queue. If the data is not in the memory, the operating system will issue a page fault, and then the data will be fetched from the hard disk to the memory, fetched from the Cache, and then returned to the MSHR, and then returned to the load queue.

questions:

1. Does micro-operation refer to operations such as mov and add when decoded?
2. Does the instruction issue refer to micro-operations sent to the reorder buffer or sent from the reorder buffer to the execution unit? After the instruction is decoded, is it sent directly to the reorder buffer?
3. Do dispatch and issue refer to the same process?
4. I have also seen some queues such as floating-point number queues or other queues. Does this refer to the place where instructions are temporarily stored due to insufficient execution units when instructions are sent from the reorder buffer to the execution unit? Do these queues refer to the same thing as the reservation station in the Tomasulo algorithm?