Properly including a .vh in a .sv file?

Question

For these past days I've been struggling with a particularly persistend issue. The SV model I am writing makes heavy use of pre-defined structs somewhat like:

typedef logic [ADR_MAX:ADR_MIN] addr;
typedef struct packed{
    logic                    opid;
    logic [COMP_ID_SIZE-1:0] comp_id;
} type_A_struct;

typedef enum logic [X_TYPE_WIDTH-1:0]{ //parameter X_TYPE_WIDTH = 3;
    X_TYPE_C2U,
    X_TYPE_U2C,
    X_TYPE_SX,
    X_TYPE_SR
}

that are defined in a struct.svh. However, the powers that be decided that the model I'm trying to implement makes use of another definition file named structs.vh which looks like this (logic -> node):

typedef node [ADR_MAX:ADR_MIN] addr;
typedef struct packed{
    node                    opid;
    node [COMP_ID_SIZE-1:0] comp_id;
} type_A_struct;

typedef enum node [X_TYPE_WIDTH-1:0]{ //parameter X_TYPE_WIDTH = 3;
    X_TYPE_C2U,
    X_TYPE_U2C,
    X_TYPE_SX,
    X_TYPE_SR
}

The problem is twofold. The struct definitions are included as a package through a .sv file:

 package ALL_STRUCTS
     `include structs.svh //This compiles.
     `include structs.vh  //This does not.
 endpackage : ALL_STRUCTS

Trying to compile with structs.vh gives me a syntax error for every line with node in it.

*Error* Syntax error at : //For typedef node [ADR_MAX:ADR_MIN] addr;

So I came up with a terrible fix:

typedef node logic; //Also tried with bit and reg

which gives two errors:

 *Error* Syntax error at logic          //At the line where the typedef is
 *Error* Illegal enumeration base type. //For every typedef enum logic

And now I'm out of ideas. I can't include the .svh file for my stuff because other parts of the model use the .vh file and that generates clashes. I'm assuming that my include is improper or that the typedef between node and logic doesn't compile. If someone could point me in the right direction on how to resolve this .vh include that'd be really grand.