iverilog : Can't find task randomize in class Packet

Question

I am new to System Verilog, and I was trying out some code where I am trying to randomize a 3-bit bus. The code goes like this:

class Packet;
    rand bit [2:0]data;
endclass

module top_tb;

initial
begin
    Packet pkt = new();
    for(int i=0;i<8;i++)
    begin
        pkt.randomize();
        $display("Itr = %0d, Data value = %0d",i, pkt.data);
    end
end
endmodule

I am using iverilog for simulating the above code, but getting the following errors:

tb4.sv:12: error: Can't find task randomize in class Packet
tb4.sv:12: error: Enable of unknown task ``pkt.randomize''.

I think randomize is an inbuilt function in SystemVerilog and should not need explicit definition in the class. So, I am not sure how to proceed with this error. Any help would be appreciated.

Answer 1

I think randomize is an inbuilt function in SystemVerilog and should not need explicit definition in the class.

You are correct.

Your code works on different simulators like VCS and Cadence on EDA playground.

When I try your code with iverilog, I get different errors.

It may be that these versions of iverilog do not support that SystemVerilog syntax. You either need to find different ways to do what you are doing that is supported by iverilog, or you need to use a simulator that supports the code you have.