Intel x64 instructions CMPSB/CMPSW/CMPSD/CMPSQ

Question

These instructions are on page 558 of the intel manual. I get the general idea but I'm stuck on the exact encdoding of these instructions. Here is what I understand, please correct me if I'm wrong. This is all in 64-bit mode.

Opcode - Instruction: 
A6 - compare byte at address RSI with byte at address RDI
67 A6 - compare byte at address ESI with byte at address EDI

66 A7 - compare word at address RSI with word at address RDI
67 66 A7 - compare word at address ESI with word at address EDI

A7 - compare dword at address RSI with dword at address RDI
67 A7 - compare dword at address ESI with dword at address EDI

REX.W A7 - Compares quadword at address RSI with quadword at address RDI
67 REX.W A7 - Compares quadword at address ESI with quadword at address EDI

Answer 1

Speaking of what those instructions are for, one must realize that they help a programmer automatize string (in the meaning of consecutive memory elements) comparison so that three things are done

1. Comparison between two memory location, which can't be done with a single cmp instruction

2. Comparison affecting flags, so that you can check the result right in the next instruction, or just use the rep/repnz prefix to loop unless a certain condition is not met.

3. Incrementation/Decrementation of both source operands according to DF, which would otherwise have to be done by at least two inc/dec or add/sub instructions, with the latter required for operations on more that just one byte

You've also shown some interest in instruction encoding. In the first place, cmpsx instructions can be encoded in two ways - with or without specified operands. This may be particularly useful, although there are some limitations.

Other things are just playing with prefix bytes. Onto this just note, that you can override the segment of the first source operand using the segment override prefix, but you can't override the es as the segment of the second operand.