Increasing AsIDBits from zero

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I would like to increase the number of AsIDBits in the Rocket-Chip from zero to eight and was wondering how that could be accomplished.

tile/BaseTile.Scala

trait HasNonDiplomaticTileParameters {
    implicit val p: Parameters
    //...
    def asIdBits: Int = p(ASIdBits)
    //...
}

https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/tile/BaseTile.scala

I would like to implement a class like similar to those defined here

subsystem/Config.Scala

//...
class WithFPUWithoutDivSqrt extends Config((site, here, up) => {
    case RocketTilesKey => up(RocketTilesKey, site) map { r =>
        r.copy(core = r.core.copy(fpu = r.core.fpu.map(_.copy(divSqrt = false))))
    }
})

class WithBootROMFile(bootROMFile: String) extends Config((site, here, up) => {
    case BootROMLocated(x) => up(BootROMLocated(x), site).map(_.copy(contentFileName = bootROMFile))
})

class WithSynchronousRocketTiles extends Config((site, here, up) => {
    case RocketCrossingKey => up(RocketCrossingKey, site) map { r =>
        r.copy(crossingType = SynchronousCrossing())
    }
})
//...

https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/subsystem/Configs.scala

I tried doing this

class SetAsIDBits(n: Int) extends Config(
    (site, here, up) => {
        case ASIdBits => n
    }
)

But got an error listed below

Configs.scala:272:10: not found: value ASIdBits    
[error]     case ASIdBits => n        
[error]          ^             
[error] one error found   
[error] (Compile / compileIncremental) Compilation failed  
1

There are 1 answers

0
seldridge On

I think this is just indicating that ASIdBits was not defined. You can try importing it:

import freechips.rocketchip.rocket.ASIdBits