I have a signal reg [1:0] BRESP
corresponding to 4 string values: okay
, exokay
, slverr
, decerr
.
How can I display those values in waveform in signal BRESP
?
This depends on simulator. Some have arguments that can detect FSMs in your design and show the FSM's state name on the waveform (e.g., ModelSim). Xilinx ISim does not have this feature (maybe new versions of it have implemented this which I am not aware).
I am going to give a universal solution regardless of what simulator you have:
First define a fixed number of characters to show the state names. Usually 10 characters is enough, then declare 10 x 8-bit registers to hold those characters:
reg [3:0] current_state; // Assuming a 4-bit state memory that supports 16 number of states.
reg [3:0] next_state;
reg [10*8-1:0] current_state_text; // 10 x 8-bit registers
reg [10*8-1:0] next_state_text;
always @ (posedge Clock or negedge Reset)
begin: STATE_MEMORY
if (!Reset) begin
current_state <= STATE_RESRT;
current_state_text <= "*****RESET"; // This text MUST be 10 characters
// I put starts (*) but you should replace it with 5 spaces
end
else begin
current_state <= next_state;
current_state_text <= next_state_text;
end
end
// Now every time you want to change the state, change the state text also like above.
Inside the simulation software set the radix of current_state_text
and next_state_text
signals to ASCII.
Seed the
radix define
command in the Modelsim reference manual