How movss opcode need to be interpreted?

Question

I get this Disassembly code on Visual Studio IDE's Debugger, from a C++ build:

For what I see on movss instruction, it should be

1. F3 0F 10 /r MOVSS xmm1, xmm2 -- Merge scalar single precision floating-point value from xmm2 to xmm1 register.
2. F3 0F 10 /r MOVSS xmm1, m32 - Load scalar single precision floating-point value from m32 to xmm1 register.
3. F3 0F 11 /r MOVSS xmm2/m32, xmm1 -- Move scalar single precision floating-point value from xmm1 register to xmm2/m32.

So, while first 3 bytes are easy to understand, I don't really understand the rest, such as 05 6b 02 10 00 for the first row, 44 24 38 for the second, and so on.

Can you help me to understand them? 05 or 44 seems /r? What does it means?

Answer 1

You will need the official pdf version of the Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2: Instruction Set Reference, A-Z.

Consult the chapter "3.1.1.1 Opcode Column in the Instruction Summary Table (Instructions without VEX Prefix)" which says:

/r Indicates that the ModR/M byte of the instruction contains a register operand and an r/m operand.

Then look in the Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte, find the value 05. It is in the xmm0 column and the disp32 row. This means a 32 bit displacement will follow. Finally see Table 2-7. RIP-Relative Addressing which says that disp32 is repurposed to mean RIP + Disp32 in 64 bit mode. Hence the 6B 02 10 00 mean RIP + 0010026B which is helpfully (?) decoded by the disassembler as 7FFB47521775 + 0010026B = 7FFB476219E0

For the second instruction, you will find the 44 in column xmm0, row [--][--]+disp8 which according to the footnote means:

1 . The [--][--] nomenclature means a SIB follows the ModR/M byte.

3 . The disp8 nomenclature denotes an 8-bit displacement that follows the ModR/M byte (or the SIB byte if one is present) and that is sign-extended and added to the index.

So the next byte is a SIB. You can see those in Table 2-3. 32-Bit Addressing Forms with the SIB Byte. The value 24 is in column esp, row none. Adjusting for 64 bit this means the address is in the form of [rsp + disp8] with the displacement given by the following byte which is 38.