FPCR.FIZ=1: for which floating-point instructions inputs are not flushed to zero?

Question

Arm Architecture Reference Manual for A-profile architecture (issue I.a) (emphasis added):

FIZ, bit [0]

When FEAT_AFP is implemented:

0b1 Denormalized single-precision and double-precision inputs to most floating-point instructions flushed to zero.

A simple question: for which floating-point instructions inputs are not flushed to zero under FIZ=1?

Answer 1

A simple question: for which floating-point instructions inputs are not flushed to zero under FIZ=1?

FNEG, FABS.