I'm using the following tools for programing in verilog+system-verilog and I'm wondering which can detect which variables are not being in use:
- Eclipse
- Eclipse DVT extension
- Cadence tools
I'm using the following tools for programing in verilog+system-verilog and I'm wondering which can detect which variables are not being in use:
I don't think DVT can detect unused variables, but AMIQ have another product called Verisimo that can do this, AFAIK.
Also, try using the HAL (HDL Advanced Linter) from Cadence to see if they support this (it's a pretty basic thing for a linter).