Is it possible to execute an IRQ in EL3 (secure monitor) if IRQ was fired in EL1 context? E.g. I have entered EL1 via spsr_el3 (el1h selected) and after that setup a vector table with vbar_el1. Now, some IRQs I want to execute in EL3 mode. How can I do that?
Related Questions in ARM64
- Advanced Arm64 books or tutorials?
- Copy constructors and const& versus the ARM ABI
- Failed to find a mounted cgroups hierarchy for the 'cpu' subsystem; you probably need to mount cgroups manually on MacOS Sonoma 14.3.1
- docker inspect splunkImage Container ID: Warining: cannot create \"/opt/splunk/var/log/splunk
- How to work around the "collect2: error: ld returned 1 exit status" error when running simple fortran files with the gfortran command?
- How to run android emulator on Ubuntu 20.04 arm64 architecture
- OpenSSL with C++ app - getting undefined references during compilation
- How do I get the atoi function to work in Assembly?
- How to navigate to the structure definition for the target architecture when cross-compiling on Ubuntu with VS Code?
- Why is data loaded bigger than expected using ADRP, ADD, and LDR instructions?
- Can't start complete colima & docker engine as x86_64 on arm64
- ARM Neon Intrinsics - Lanes in FMA
- Linker Command Failed with Exit Code 1 When Excluding arm64 Architecture on Simulator with Xcode 15
- cpython3.6.15 has Bus error (core dumped) problem in arm paltform
- QMainWindow not found
Related Questions in BARE-METAL
- In rke kube-proxy pod is not present
- Portenta H7 Baremetal Development and a Little Guidance on Embedded System Learning Roadmap
- I am trying to write bare metal programming for STM32F407, How to configure registers the steps to initialize the CAN1 to transmit the message
- Debug a fake STM32F103C6 using STM32CubeIDE
- Unit tests on registers with bare metal programming
- ARM Cortex-A9 MCR for some CoProcs Causes Undefined Instruction in SYS Mode
- I'm programming UART on STM32F103C6. I made the code below but when I try it, it's not working. Could anyone help me find my error?
- Assistance Needed: Trouble Running Bare-Metal Code on second core in Cyclone V SoC
- STM32G4 Irq Handler block main function
- libgcc - Overview from the used functions by gcc depending on the architecture
- Why does I2C send wrong data?
- Initializer element is not a compile-time constant but compiler doesn't throw error
- Can't make UART work in Bare Metal using STM32
- How to implement non-blocking IO input in embedded baremetal systems?
- Using CMSIS with baremetal ARM cortex-M0 on Texas Instruments
Related Questions in IRQ
- STM32MP1 linux IRQs & EXTI controller config in DTS file
- How to trigger the Linux IRQ handler thread again when it finishes if there was same IRQ triggered while it was running
- /proc/interrupts not showing all irqs
- convert HW IRQ to Linux IRQ
- How to provide interrupt generating GPIOs from a kernel module
- Why are all irq disabled for retarget write on STM32?
- how to use interrupt function in Ubuntu 20?
- Can I increase a thread irq priority
- do I need to fill all the IDT exception entries, before handling IRQs?
- About the use of tasklet_hrtimer_init in hardware interrupt callback function
- How to know whether an IRQ was served immediately on ARM Cortex M0+ (or any other MCU)
- Crash when adding or removing data in code on an IRQ
- RPi Pico freezes on IRQ Interrupt call
- Linux kernel IRQ to execute long action
- GICv2 IRQ ID 1023
Popular Questions
- How do I undo the most recent local commits in Git?
- How can I remove a specific item from an array in JavaScript?
- How do I delete a Git branch locally and remotely?
- Find all files containing a specific text (string) on Linux?
- How do I revert a Git repository to a previous commit?
- How do I create an HTML button that acts like a link?
- How do I check out a remote Git branch?
- How do I force "git pull" to overwrite local files?
- How do I list all files of a directory?
- How to check whether a string contains a substring in JavaScript?
- How do I redirect to another webpage?
- How can I iterate over rows in a Pandas DataFrame?
- How do I convert a String to an int in Java?
- Does Python have a string 'contains' substring method?
- How do I check if a string contains a specific word?
Trending Questions
- UIImageView Frame Doesn't Reflect Constraints
- Is it possible to use adb commands to click on a view by finding its ID?
- How to create a new web character symbol recognizable by html/javascript?
- Why isn't my CSS3 animation smooth in Google Chrome (but very smooth on other browsers)?
- Heap Gives Page Fault
- Connect ffmpeg to Visual Studio 2008
- Both Object- and ValueAnimator jumps when Duration is set above API LvL 24
- How to avoid default initialization of objects in std::vector?
- second argument of the command line arguments in a format other than char** argv or char* argv[]
- How to improve efficiency of algorithm which generates next lexicographic permutation?
- Navigating to the another actvity app getting crash in android
- How to read the particular message format in android and store in sqlite database?
- Resetting inventory status after order is cancelled
- Efficiently compute powers of X in SSE/AVX
- Insert into an external database using ajax and php : POST 500 (Internal Server Error)
What you want is called "Physical IRQ Routing", and is controlled via
scr_el3. From the manual:IRQ, bit [1] Physical IRQ Routing. 0b0 When executing at Exception levels below EL3, physical IRQ interrupts are not taken to EL3. When executing at EL3, physical IRQ interrupts are not taken. 0b1 When executing at any Exception level, physical IRQ interrupts are taken to EL3.If you only want to handle some IRQs at EL3 and leave others to EL1, then you can simply handle that in the EL3 exception vector by setting:
spsr_el1tospsr_el3.elr_el1toelr_el3.elr_el3tovbar_el1plus one of0x80/0x280/0x480/0x680depending on the state bits inspsr_el3.spsr_el3 = (spsr_el3 & ~0xf00fff) | 0x3c5. If your architecture has PAN support, you'll also have to checkspsr_el1for theSPANfield, and if that's zero, OR0x400000intospsr_el3.