VHDL syntax error using when

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I have the following code:

DATA_LCD <= DATA_ROM when SW(1)='0' or char_code<97 or char_code>122 else
                 std_logic_vector(char_code-32); -- no modification in this code
                     DATA_ROM when SW(2)='0' else
                     std_logic_vector(char_code+1);

But when i try to compile it i get following errors:

Error (10500): VHDL syntax error at LCD_FSM.vhd(57) near text "="; expecting "(", or "'", or "."

Error (10500): VHDL syntax error at LCD_FSM.vhd(57) near text "when"; expecting "(", or "'", or "."

How can I fix it?

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ARude On

Brian is right, line 3 is a new (malformed) statement. You forgot to put another DATA_LCD <= at the beginning of it.

DATA_LCD <= DATA_ROM when SW(2)='0' else std_logic_vector(char_code+1);