I have come across a system crash during the PL353 NAND controller initialization, if D-cache enabled in cortex-r4 based micro controller. The NAND chip interfaced with ARM’s PL353 Static Memory Controller, and SMC is connected to main matrix bus through AXI bus. The driver initialize the controller and does some basic communication (write and read of predefined data). The NAND driver works fine with d-cache disabled, whereas the system get crash during NAND controller initialization, when D-cache is enabled.
The issue is resolved with workaround of enabling MPU, and defining memory region for NAND device memory map. I am unable to understand the behavior. Its hard to debug the issue, as the debugger losing connection after crash (cannot load PC register error is reported).
Note: The system getting crash after sending AXI command to NAND controller.
Please let me know how can I debug or get hint of the issue to resolve or else please let me know what is going wrong.