Some problems about temporal locality and spatial locality

Question

I met two cases in final exam. First case memory fetch information from location like: 0x101,0x102,0x101,0x102,0x101,0x102,0x101,0x102.

Second case memory fetch information from location like: 0x101,0x101,0x101,0x101,0x111,0x109,0x102,0x100.

The question is in which case it use temporal locality.

Here is my point: In the first case. I think in reality when we access 0x101,the memory will also access 0x102 into cache. Then in the following six fetch, there will be no penalty. That means in this case we only have one cache miss. Here I think we benefit from both temporal locality and spatial locality. while in the second case in the first four step we benefit from temporal locality but in the following step we do not have temporal locality. Actually this leads to more cache miss than first choice. I think both are right but we can only have one answer so I feel confused.

Answer 1

It's definitely the 2nd choice. The question is clear enough: you are explicitly making use of temporal locality in the second case because you're accessing 0x101 multiple times in a row.

See this question: Spatial vs. Temporal locality

Temporal locality implies that you're going to access the same address multiple times, relatively closely in time.

You are right in saying that the first case also uses temporal locality, but I'd say it gears towards spatial locality because you are alternating between 2 neighbour positions, thus, cache misses are minimized because of spatial locality, not because of temporal locality.

In the second case, cache misses are minimized because of temporal locality. Remember that temporal locality says that if you accessed position X right now, you will likely do so again very soon. This is the property explored in the second case.

Answer 2

I'd vote for the 2nd one. As you said, it has a clear case of temporal locality on the first 4 steps.

It is never said that your cache has space to hold more than 1 item in memory. It could be a CPU with just 1 register or something. So it is possible that the first case does not exhibit any locality whatsoever.

Did the question provide more details on the architecture of the system?