Suppose we have one simple variable(std::atomic<int> var
) and 2 threads T1
and T2
and we have the following code for T1
:
...
var.store(2, mem_order);
...
and for T2
...
var.load(mem_order)
...
Also let's assume that T2
(load) executes 123ns later in time(later in the modification order in terms of the C++ standard) than T1
(store).
My understanding of this situation is as follows(for different memory orders):
memory_order_seq_cst
-T2
load is obliged to load2
. So effectively it has to load the latest value(just as it is the case with the RMW operations)memory_order_acquire
/memory_order_release
/memory_order_relaxed
-T2
is not obliged to load2
but can load any older value with the only restriction: that value should not be older than the latest loaded by that thread. So, for examplevar.load
returns0
.
Am I right with my understanding?
UPDATE1:
If I'm wrong with the reasoning, please provide the text from the C++ standard which proofs it. Not just theoretical reasoning of how some architecture might work.
Having found no arguments to prove my understanding wrong I deem it correct and my proof is as follows:
That's correct because all operations using
memory_order_seq_cst
should form the single total order on the atomic variable of all the memory operations. Excerpt from the standard:The next point of my question:
I didn't find any evidences which might indicate that the load executed later in the modification order should see the latest value. The only points I found for the store/load operations with any memory order different from the
memory_order_seq_cst
are these:and
So the only guarantee we have is that the variable written will be visible within some time - that's pretty reasonable guarantee but it doesn't imply immediate visibility of the previous store. And it proofs my second point.
Given all that my initial understanding was correct.