Order of delay slots MIPS

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Supposed we have a load instruction followed by another load instruction, then what is the order of execution? Example:

lui $t0, 0x1000    #(1)
lbu $t1, ($t0)     #(2)
addi $t0, $t0, 1   #(3)

I tested it with Spim, the result was in order (1) -> (2) -> (3) and I cant understand since load instrucion should take into account load delay slots.

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