I have the following code:
unsigned short wrLine;
unsigned short prev = ((wrLine - 1) % 16);
wrLine = (wrLine + 1) % 16;
Which generates the following disassembly:
unsigned short prev = ((wrLine - 1) % LINES_IN_FIFO);
0041456A movw r3, #25282
0041456E movt r3, #8192
00414572 ldrh r3, [r3]
00414574 uxth r3, r3
00414576 add.w r2, r3, #4294967295
0041457A mov.w r3, #15
0041457E movt r3, #32768
00414582 ands r3, r2
00414584 cmp r3, #0
00414586 bge #10
00414588 add.w r3, r3, #4294967295
0041458C orn r3, r3, #15
00414590 add.w r3, r3, #1
00414594 strh r3, [r7, #4]
wrLine = (wrLine + 1) % LINES_IN_FIFO;
0041463E movw r3, #25282
00414642 movt r3, #8192
00414646 ldrh r3, [r3]
00414648 uxth r3, r3
0041464A add.w r2, r3, #1
0041464E mov.w r3, #15
00414652 movt r3, #32768
00414656 ands r3, r2
00414658 cmp r3, #0
0041465A bge #10
0041465C add.w r3, r3, #4294967295
00414660 orn r3, r3, #15
00414664 add.w r3, r3, #1
00414668 uxth r2, r3
0041466A movw r3, #25282
0041466E movt r3, #8192
Interestingly enough if wrLine is zero then prev will end up equaling 0xFFFF while when wrLine is 15 it will end up equaling 0x0000. Any idea why only one of these works?
Thanks, Devan
short
data types are converted toint
before any arithmetic is performed. Since your modulus is16
it is thus anint
and not anunsigned
.Don't use
short
if you mustn't and do mod operations only withunsigned
types, here16U
.