Memory - Natural address boundary

Question

Definition

Structure padding is the process of aligning data members of the structure in accordance with the memory alignment rules specified by the processor.

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what is the memory alignment rule for Intel x86 processor?

As per my understanding, natural address boundaries for Intel-x86 processor is 32 bits each(i.e.,addressOffset%4==0)

So, In x86 processor,

struct mystruct_A {
    char a;
    int b;
    char c;

};

will be constructed as,

struct mystruct_A {
    char a;
    char gap_0[3]; /* inserted by compiler: for alignment of b using array */
    int b;
    char c;
    char gap_1[3]; /* for alignment of the whole struct using array */
};

what is the memory alignment rule for Intel x86-64 processor?

As per my understanding, natural address boundaries for Intel x86-64 processor is 64 bits each(i.e.,addressOffset%8==0)

So, In x86-64 processor,

struct mystruct_A {
    char a;
    int b;
    char c;

};

will be constructed as,

struct mystruct_A {
    char a;
    char gap_0[7]; /* inserted by compiler: for alignment of b using array */
    int b;
    char c;
    char gap_1[7]; /* for alignment of the whole struct using array */
};

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If the above understanding is correct, then I would like to know why use an array of int for bit operation?

Recommends to use int sized data, as mentioned here, that says, because the most cost efficient access to memory is accessing int sized data.

Question:

Is this memory alignment rule that forces to declare int sized data for bit operations?

Answer 1

Addendum: this is valid for x86/-64 bit processors, but also for others. I am blindly assuming you're using those. For others, you should check the respective manuals.

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If fasm automatically added fillers into my structs i'd go insane. In general, performance is better when accesses to memory are on a boundary corresponding to the size of the element you want to retrieve. That being said, it's not a definite necessity!

This article here might be worth a look: https://software.intel.com/en-us/articles/coding-for-performance-data-alignment-and-structures

Intel's suggestion for optimal layout is to start with the biggest elements first and going smaller as the structure increases. That way you'll stay aligned properly, as long as the first element is aligned properly. There are no three-byte elements, thus misalignment is out of the question and all the compiler might do is adding bytes at the end, which is the best way to make sure it won't ruin things if you choose to do direct memory accesses instead of using variables.

The safest procedure is to not rely on your compiler, but instead aligning the data properly yourself.

Fun Fact: loops work the same way. Padding NOPs in your code, before the start of a loop, can make a difference.