I/O APIC external IRQ static distribution

Question

I'm reading ULK3, and got the following statement

“Interrupt requests coming from external hardware devices can be distributed among the available CPUs in two ways:

Static distribution The IRQ signal is delivered to the local APICs listed in the corresponding Redirection Table entry. The interrupt is delivered to one specific CPU, to a subset of CPUs, or to all CPUs atonce (broadcast mode).”

I know linux don't use static distribution but my question is:

If a OS init one entry of Interrupt Redirection Table using static distribution, and that IRQ raised and then the multi-APIC system selects two of the CPUs (here, it's just a example that two cpus are listed in the entry) and delivers the signal to the corresponding local APIC, and the two local APICs both accept the interrupt.

1. Just one cpu will handle the interrupt? or both? If one, how to select?
2. Is there an OS using Static Distribution?

If yes, please show me the example

If no, why does it exist? Is it because of some historical issue? What is original reason of this design?

Answer 1

I read APIC in intel P6 family. multi destination messages are for inter-processor interrupts and start-up configurations. Thus, all of the destination processors must accept the interrupt. in start-up configuration, each of the processors introduces itself to the OS. However, inter-processor interrupts are sometimes for matching local APICs.

Answer 2

here is a link describe mechanisms of local APIC, IO APIC and ICC bus.

http://syszux.com/book/kernel/Understanding.the.Linux.Kernel(3rd%20Edition)/understandlk-CHP-4-SECT-2.html

Below paragraph is extracted from that page might be answer of your question:

Dynamic distribution

The IRQ signal is delivered to the local APIC of the processor that is executing the process with the lowest priority.

Every local APIC has a programmable task priority register (TPR), which is used to compute the priority of the currently running process. Intel expects this register to be modified in an operating system kernel by each process switch.

If two or more CPUs share the lowest priority, the load is distributed between them using a technique called arbitration . Each CPU is assigned a different arbitration priority ranging from 0 (lowest) to 15 (highest) in the arbitration priority register of the local APIC.

Every time an interrupt is delivered to a CPU, its corresponding arbitration priority is automatically set to 0, while the arbitration priority of any other CPU is increased. When the arbitration priority register becomes greater than 15, it is set to the previous arbitration priority of the winning CPU increased by 1. Therefore, interrupts are distributed in a round-robin fashion among CPUs with the same task priority.[*]