I am confusing some assembly code about enable PE within boot/setup.s file in Linux 0.11

Question

Related assembly codes are located in boot/setup.s and I paste them below:

    mov ax,#0x0001        ! protected mode (PE) bit 
    lmsw ax               ! This is bit!
    jmpi 0,8              ! jmp offset 0 of segment 8 (cs)

The first two lines have made the corresponding bit changes in CR0 control register.
So,my problem is :
    When instruction lmsw ax is being executed, the ip register points to next instruction jmpi 0,8 .
More exactly , at this point , cs:ip points to the memory location of instruction jmpi 0,8 .
But after execution of instruction lmsw ax, the PE mechanism is enabled. The cs value now
represents segment selector, but the corresponding GDT description entry is not
prepared for it. the GDT only contains two valid entries located in 1 and 2 respectively.So, I
think the next instruction specified by cs:ip is not the instruction jmpi 0,8.
cs:ip now points to an invalid memory address. The above last instruction jmpi 0,8 which is used to place the right values into cs and eip registers cannot be reached. I know I was wrong because the Linux 0.11 is verifying by long term practice. Please help me point the mistakes that I make.Thanks very much.

Answer 1

The CPU doesn't look up selectors in the GDT (or LDT) every time segment register is used. It only reads the descriptor table in memory when the segment register is loaded. It then stores the information in the segment descriptor cache.The same thing happens in real mode, when a segment register is loaded with a value, that value is used to create an entry in the descriptor cache. Then whenever that segment is used, both in real and protected mode, the processor uses the values stored in the cache.

When you switch from real mode to protected mode none of the segment registers change and none of the entries in the descriptor cache change. The cache entry for the CS register remains the same as it was before, and so the CPU executes following instruction as expected. It's not until the following far jump instruction is executed that the value of the CS register changes, which then replaces the old real mode descriptor entry with a new protected mode entry.