How does trace-inputs provided to trace-driven simulators look like?

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Simulators used to study computer architecture performance are broadly categorized as execution-driven and trace-driven. They work in the following fashion.

Trace Driven Simulator: A real machine is used to execute a benchmark program/software in the native ISA binary. This binary is usually instrumented (modified) so that as each instruction is executed information such as the instruction op-code, data address, and branch information is written out in a trace file. Later on, these traces are being read into a simulator which can run on any machine (different ISA) and analyzed for performance study.

Execution Driven Simulator: Benchmark is directly executed. As the program is executed performance study is performed at the same time.

Can you explain how does traces (input to a trace-driven simulator) look like? Broadly I know that it needs to have things like opcode, memory references, branch outcomes etc. What else does it need to store so that the simulator faces no issues starting/running the benchmark from an abrupt point (i.e. not from start)?

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