I've got a simple project in ISE (Webpack) that consists of ROM block that I'm filling with data from a coe file. If I edit that file with an external application (notepad, say) then how do I get the changes to propagate through to my design implementation? Even double-clicking the xco and clicking the "Generate" button doesn't seem to work, the only way I've been able to do it so far is to delete the core and rebuild it again from scratch.
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I have seen some coe files, but normally I would suggest to use mem files.
Xilinx delivers a tool called Data2MEM, which can write BlockRAM contents from mem files. Data2MEM is also capable of exchanging BlockRAM contents in bit files. So you don't have to re-synthesize your design if you want to change the BlockRAM contents.
Data2MEM uses a simple bmm (BlockRAM Memory Map) file to find the appropriate BlockRAM instances in the design. Data2MEM UG658