How can I design a 2-1 multiplexer with enable using only NAND gates?

Question

So, I manage to design something but I need confirmation and my real question is the following:

How can I design 4-1 multiplexer using 2 multiplexers designed as in the title of the question (using only NANDs) plus as many NOR gates as I need?

To sum up, first question: how to design a 2-1 using only Nand gates. Second question: how to design a 4-1 using two of the circuits of first question plus as many NOR gates as I need.

Thanks

Answer 1

As answer to your first question, assuming your 2-1-multiplexer has three inputs (in1, in2 and sel) you can implement it this way:

(in1 NAND (sel NAND 1)) NAND (in2 NAND sel)

The inner (sel NAND 1) implements NOT on sel-input.

Answer 2

This smells like homework, so I wont write down an answer, but:

How about you figure out how you can create the required basic building blocks (NOT, AND, OR) using only NAND logic?

It should then be pretty easy to build whatever multiplexer you like with just the NANDs.