I have a GNU make makefile with some explicit suffix rules defined which make is not honoring.
Here is the relevant part of the makefile:
#------------------------------------------------------------
# Suffix Targets
#------------------------------------------------------------
.SUFFIXES = .$(C++_SUFFIX) .$(C_SUFFIX) .$(IDL_SUFFIX) .hh .o
.$(IDL_SUFFIX).hh:
@echo "TARGET : .$(IDL_SUFFIX).hh"
@echo "COMPILER : $(IDL)"
@echo "OPTIONS : $(IDL_COMPILE_OPTS)"
$(IDL) $(IDL_COMPILE_OPTS) $*.$(IDL_SUFFIX)
@echo "COMPILED : $*.hh $*C.$(C++_SUFFIX) $*S.$(C++_SUFFIX)"
.$(C++_SUFFIX).o:
@echo "TARGET : .$(C++_SUFFIX).o"
@echo "COMPILER : $(C++)"
@echo "OPTIONS : $(C++_COMPILE_OPTS) $(NO_LINK_PHASE) -o $*.o"
$(C++) $(C++_COMPILE_OPTS) $(NO_LINK_PHASE) -o $*.o $*.$(C++_SUFFIX)
@echo "COMPILED : $*.o"
.$(C_SUFFIX).o:
@echo "TARGET : .$(C_SUFFIX).o"
@echo "COMPILER : $(C)"
@echo "OPTIONS : $(C_COMPILE_OPTS) $(NO_LINK_PHASE) -o $*.o"
$(C) $(C_COMPILE_OPTS) $(NO_LINK_PHASE) -o $*.o $*.$(C_SUFFIX)
@echo "COMPILED : $*.o"
The suffix names are defined earlier in the makefile:
#------------------------------------------------------------
# Suffixes
#------------------------------------------------------------
C++_SUFFIX = cpp
C_SUFFIX = c
IDL_SUFFIX = idl
However, when make is run it fails to find a sufficient suffix rule to make .hh files from .idl files (The first suffix rule I defined)
Make: Don't know how to make /path/to/example/file.hh. Stop.
Any help would be appreciated.
For anyone who stumbles upon this in the future, my mistake was, of course, a simple one.
.SUFFIXES is special target, not variable. Therefore, to append to the .SUFFIXES list you use the syntax
and not