Hello I want to record 8 channels from TIDA-01454 CMB into a Beaglebone AI. As the CMB is built with two PCM1864 ADCs and it is also a Beagle board, I followed this guide(https://www.ti.com/lit/an/sprac97/sprac97.pdf) with some changes(channels_max=16) in order to make it compatible with Beaglebone AI.
I have managed to record audio from 4 of the 8 microphones that the CMB has(I just tap the mic to check if that one is working). However I want to record the 8 channels. Currently the working microphones are MIC1, MIC4, MIC5 and MIC8, although I would say there is much noise.
The CMB has 4 data output pins, so I suppose each one transmits 2 channels and therefore this is my dts file:
pcm5102a: pcm5102a {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
status = "okay";
};
sound {compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "PCM5102a";
simple-audio-card,bitclock-master = <&sound1_master>;
simple-audio-card,frame-master = <&sound1_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
};
sound1_master: simple-audio-card,codec {
#sound-dai-cells = <0>;
sound-dai = <&pcm5102a>;
//clocks = <&mcasp1_fck>;
//clock-names = "mclk";
};
};
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
num-serializer = <4>;
serial-dir = < /* 1 TX 2 RX 0 unused */
2 2 0 0 0 0 0 0 0 0 2 2
>;
rx-num-evt = <4>;
tx-num-evt = <4>;
};
The serial-dir is that way because I use mcasp1_axr0, mcasp1_axr1, mcasp1_10 and mcasp1_axr11 because those are the ones available in Beaglbone AI. This is my configuration for the CMB:
uint8_t U1_PCM1864_CONFIG[][2] = {
{0x00, 0x00}, // Change to Page 0
{0x01, 0x40}, // PGA CH1_L to 32dB
{0x02, 0x40}, // PGA CH1_R to 32dB
{0x03, 0x40}, // PGA CH2_L to 32dB
{0x04, 0x40}, // PGA CH2_R to 32dB
{0x05, 0x86}, // Enable SMOOTH PGA Change; Independent Link PGA;
{0x06, 0x41}, // Polarity: Normal, Channel: VINL1[SE]
{0x07, 0x41}, // Polarity: Normal, Channel: VINR1[SE]
{0x08, 0x44}, // Polarity: Normal, Channel: VINL3[SE]
{0x09, 0x44}, // Polarity: Normal, Channel: VINR3[SE]
{0x0A, 0x00}, // Secondary ADC Input: No Selection
{0x0B, 0x44}, // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format
{0x10, 0x03}, // GPIO0_FUNC - SCK Out; GPIO0_POL - Normal
{0x11, 0x50}, // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal
{0x12, 0x04}, // GPIO0_DIR - GPIO0 - Output
{0x13, 0x40}, // GPIO3_DIR � GPIO3 - Output
{0x20, 0x11} // MST_MODE: Master; CLKDET_EN: Disable
};
uint8_t U2_PCM1864_CONFIG[][2] = {
{0x00, 0x00}, // Change to Page 0
{0x01, 0x40}, // PGA CH1_L to 32dB
{0x02, 0x40}, // PGA CH1_R to 32dB
{0x03, 0x40}, // PGA CH2_L to 32dB
{0x04, 0x40}, // PGA CH2_R to 32dB
{0x05, 0x86}, // Enable SMOOTH PGA Change; Independent Link PGA;
{0x06, 0x41}, // Polarity: Normal, Channel: VINL1[SE]
{0x07, 0x41}, // Polarity: Normal, Channel: VINR1[SE]
{0x08, 0x44}, // Polarity: Normal, Channel: VINL3[SE]
{0x09, 0x44}, // Polarity: Normal, Channel: VINR3[SE]
{0x0A, 0x00}, // Secondary ADC Input: No Selection
{0x0B, 0x44}, // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format
{0x10, 0x00}, // GPIO0_FUNC – GPIO0; GPIO0_POL - Normal
{0x11, 0x50}, // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal
{0x12, 0x00}, // GPIO0_DIR - GPIO0 - Input
{0x13, 0x40}, // GPIO3_DIR � GPIO3 - Output
{0x20, 0x01} // MST_MODE: Slave; CLKDET_EN: Enable
};
So what am I missing to get the 8 channels?
I just had a brief view of the chip you reference here, from what i see the PCM1864 has four channels and one data line (I2S) thus in order to use two PCM1864 you would need to specify two pins for it and set the Channel count to 4.
tdm-slots specifies how many TDM Slots (channels) are present, if you need 4, you should specify 4 here.
serial-dir specifies if a serial (aka data line for I2S) is a in r output. You have two PCM1864 thus i would assume that you need only two inputs (2 RX) instead of four.