Force LDR instruction to place value in literal pool in THUMB assembly

Question

I'm trying to create a matching GBA disassembly using devkitpro, and I'm having trouble with the THUMB instruction LDR R1, =0x3FF.

I want it to place 0x3FF in the literal pool and generate a PC-relative address, which is what the assembled version does, however it insists on creating a MOVW 32-bit instruction instead.

I've tried using the length specifier LDR.N to force it to generate a 16-bit instruction, however this appears to have made no difference at all.

While I could just use the PC-relative address directly, since this is in the middle of the literal pool it would cause me to have to delete a large amount of the pool and implement the loads in the same way, which would be very messy, so this is only a last resort. If anyone knows some way I could force this instruction to generate a PC-relative address that would be very helpful. Thanks!

Answer 1

Your should provide a Minimal, Reproducible Example next time you ask a question since this will make easier for people to help you.

I may have misunderstood your question, but I am not getting any movw instruction in the code assembled from the following program - you may just have specified the wrong cpu for the GBA, or you may be using the default cpu which is unlikely to be arm7tdmi, since it was introduced in 1994.

ldr.s:

.cpu arm7tdmi
.thumb
ldr r1, =0x3ff
.end

/opt/arm/10/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-as -c ldr.s
/opt/arm/10/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-objdump -d a.out 

a.out:     file format elf32-littlearm


Disassembly of section .text:

00000000 <.text>:
   0:   4900            ldr     r1, [pc, #0]    ; (4 <.text+0x4>)
   2:   0000            .short  0x0000
   4:   000003ff        .word   0x000003ff

Setting the cpu , say, to cortex-m3, does provide an output consistent with what you are describing:

ldr.s:

    .cpu cortex-m3
    .thumb
    ldr r1, =0x3ff
    .end

    /opt/arm/10/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-as -c ldr.s
    /opt/arm/10/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-objdump -d a.out 
    
    a.out:     file format elf32-littlearm
    
    
    Disassembly of section .text:
    
00000000 <.text>:
   0:   f240 31ff       movw    r1, #1023       ; 0x3ff