I am in EL1. The EL3 Code is supposed to have activated sve using CPTR_EL3 for all levels. I am trying to do a simple FMOV to sve registers. It crashes.
- What else should I check/set for SVE instruction to be available?
This is compiled using clang/llvm-as
.arch armv8-a+sve
// load feature register
MRS x1, CPACR_EL1
// Bit 32 is sve actually implemented
MRS x4, ID_AA64PFR0_EL1
TBZ x4, #32, no_sve
// Set bit 16-17 and 20-21 to '1'
MOV x2, #3
ORR x1, x1, x2, LSL #16
ORR x1, x1, x2, LSL #20
MSR CPACR_EL1, x1
// Set Length to Max
MOV x1, #15
// crash: MSR ZCR_EL1, x1
// Clobber Register
// crash: fmov z0.d, #3.0
// If sve is available return #0x7
mov w0, #0x7
ret
no_sve:
// If sve is NOT available return #0x9
mov w0, #0x9
ret