Do page table entries at each level in a Two-Level Paging system have to be the same size?

Question

Let's say hypothetically you have a two-level paging system with a 32-bit logical address and the page offset has been predetermined to be 12-bits. This leaves 20-bits for the page numbers. All the examples I can find online and in textbooks show the page numbers then split into 2 blocks of 10 such that the virtual address looks something like this:

[ p1: 10-bits | p2: 10-bits | offset: 12-bits ]

Do both page numbers have to be 10-bits? For example, can it be this instead:

[ p1: 8-bits | p2: 12-bits | offset: 12-bits ]

And what about using an odd number of bits for the page numbers, such as:

[ p1: 9-bits | p2: 11-bits | offset: 12-bits ]

I understand splitting them evenly, makes everything clean and orderly. I'm just trying to figure out what it is technically possible and if there are any drawbacks/benefits to doing it differently.

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*Full Disclosure: This question itself is not a homework problem, but a question that arose while trying to solve a homework problem. Not trying to get anyone to do my work for me. Just trying to understand what is possible and if there are any advantages/disadvantages of doing it one way or the other.

Answer 1

There is no reason that they need to be the same size other than to simplify the implementation. In fact, in some systems (such as x86), the p2 field you show can be part of the offset for some pages and not others, to allow multiple page sizes.