Device Tree for PHY-less connection to a DSA switch

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We have a little problem with creating a device tree for our configuration of a Marvell DSA switch and a Xilinx Zynq processor. They are connected like this:

|——————————————|               |——————————————————————————————|
|     e000b000—|———— SGMII ————|—port6 (0x16)      port3 —— PHY3
| Zynq         |               |         mv88e6321            |
|     e000c000—|—x           x—|—port5             port4 —— PHY4
|——————————————|               |——————————————————————————————|
        |___________ MDIO _______________|

And we have a device tree for the Linux kernel, which looks like this:

ps7_ethernet_0: ps7-ethernet@e000b000 {
            #address-cells = <1>;
            #size-cells = <0>;
            clock-names = "ref_clk", "aper_clk";
            clocks = <&clkc 13>, <&clkc 30>;
            compatible = "xlnx,ps7-ethernet-1.00.a";
            interrupt-parent = <&ps7_scugic_0>;
            interrupts = <0 22 4>;
            local-mac-address = [00 0a 35 00 00 00];
            phy-handle = <&phy0>;
            phy-mode = "gmii";
            reg = <0xe000b000 0x1000>;
            xlnx,ptp-enet-clock = <0x69f6bcb>;
            xlnx,enet-reset = "";
            xlnx,eth-mode = <0x0>;
            xlnx,has-mdio = <0x1>;
            mdio_0: mdio {
                #address-cells = <1>;
                #size-cells = <0>;
                phy0: phy@16 {
                    compatiable = "marvell,dsa";
                    reg = <0x16>;
                } ;
            } ;

} ;

    dsa@0 {
            compatible = "marvell,dsa";

            #address-cells = <2>;
            #size-cells = <0>;

            interrupts = <10>;

            dsa,ethernet = <&ps7_ethernet_0>;
            dsa,mii-bus = <&mdio_0>;

            switch@0 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0 0>;
             port@3 {
                    reg = <3>;
                    label = "lan0";                
             };
             port@4 {
                    reg = <4>;
                    label = "lan1";
             };
             port@5 {
                    reg = <5>;
                    label = "lan2";
             };
             port@6 {
                    reg = <6>;
                    label = "cpu";       
             };
        };
        };     
} ;

The problem is, as you can see from the picture, there is no PHY attached to the port 6, i.e. the connection between the Zynq and the switch is PHY-less, but I had to specify <phy0> in the device tree to make the dsa driver to see the switch. But then it tries to talk to a non-existent PHY and fails, obviously.

So the question is: how to create a proper device tree for a dsa switch connected to a processor like this?

Thank you for any help!

(There is a somewhat similar question P1010 MAC to Switch port direct connection without PHY but I cannot comment on it and there is no answer, unfortunately)

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There are 1 answers

3
Vijay Katoch On

Instead of specifying &phy0 when there is none, you can write it as fixed-link

fixed-link = <0 1 1000 0 0>;

Where 0 is emulated PHY ID, 1-> full-duplex and speed is 1000 Mb/s. You would also want to disable autonegotiation for the processor port to which switch port 6 is connected.

ps7_ethernet_0: ps7-ethernet@e000b000 {
        #address-cells = <1>;
        #size-cells = <0>;
        clock-names = "ref_clk", "aper_clk";
        clocks = <&clkc 13>, <&clkc 30>;
        compatible = "xlnx,ps7-ethernet-1.00.a";
        interrupt-parent = <&ps7_scugic_0>;
        interrupts = <0 22 4>;
        local-mac-address = [00 0a 35 00 00 00];
        fixed-link = <0 1 1000 0 0>;
        phy-mode = "gmii";
        reg = <0xe000b000 0x1000>;
        xlnx,ptp-enet-clock = <0x69f6bcb>;
        xlnx,enet-reset = "";
        xlnx,eth-mode = <0x0>;
        xlnx,has-mdio = <0x1>;
        mdio_0: mdio {
            #address-cells = <1>;
            #size-cells = <0>;
        } ;

} ;

dsa@0 {
        compatible = "marvell,dsa";

        #address-cells = <2>;
        #size-cells = <0>;

        interrupts = <10>;

        dsa,ethernet = <&ps7_ethernet_0>;
        dsa,mii-bus = <&mdio_0>;

        switch@0 {
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <22 0>;
         port@3 {
                reg = <3>;
                label = "lan0";                
         };
         port@4 {
                reg = <4>;
                label = "lan1";
         };
         port@5 {
                reg = <5>;
                label = "lan2";
         };
         port@6 {
                reg = <6>;
                label = "cpu";       
         };
    };
    };     

} ;

I'm assuming switch chip SMI address is 0x16; if not make reg = <22,0> to <0,0> as before under switch@0. Also you may need to add mdio driver reg address and compatible property , which are not specified in your device tree.