OK hello all , what i am trying to do in VHDL is take an 8 bit binary value and represent it as BCD but theres a catch as this calue must be a fraction of the maximum input which is 9.
1- Convert input to Integer e.g 1000 0000 -> 128
2- Divide integer by 255 then multiply by 90 ( 90 so that i get the one's digit and the first digit after the decimal point to be all after the decimal point)
E.g 128/255*90 = 45.17 ( let this be signal_in)
3.Extract the two digits of 45 by dividing by 20 and store them as separate integers e.g I would use something like:
LSB_int = signal_in mod 10
Then i would divide signal in by 10 hence changing it to 4.517 then let that equal to MSB_int.. (that would truncate the decimals and store 4 right)
4.Convert both the LSB_int and MSB_int to 4 digit BCD
..and i would be perfect from there...But sadly i got so much trouble...with different data types (signed unsigend std_logic_vectors)and division.So i just need help with any flaws in my thought process and things i should look out for when doing this..
I actually did over my code and thought i saved this one..but i didn't and well i still believe this solution can work i would reply with what i think was my old code...as soon as i could remember it all..
Here is my other question with my new code..(just to show i did do something..) Convert 8bit binary number to BCD in VHDL
f I understand well, what you need is to convert an 8bit data
0-255 → 0-9000
and represent it with 4 BCD digit.
For example You want 0x80 → 4517 (BCD)
If so I suggest you a totally different idea:
1)
let convert input range in output range with a simple 8bit*8bit->16bit
(in_data * 141) and keep the 14 MSB (0.1% error)
And let say this 14 bit register is the TARGET
2)
Build a 4 digit BCD Up/Down counter (your output)
Build a 14bit Binary Up/Down counter (follower)
Supply both with the same input (reset, clk, UpDown)
(making one the shadow of the other)
3)
Compare TARGET and the binary counter
4)
end