I want to make communication using Altera MM Mailbox IP component, between Aria V hps and my nios processors.
I managed to write down C code for Nios processors (FPGA side) to work with mailbox IP, then I made header file for HPS using sopc-create-header-files via EDS.
This what sopc-create-header-files made for me:
#define MAILBOX_SIMPLE_0_COMPONENT_TYPE altera_avalon_mailbox_simple
#define MAILBOX_SIMPLE_0_COMPONENT_NAME mailbox_simple_0
#define MAILBOX_SIMPLE_0_BASE 0x60
#define MAILBOX_SIMPLE_0_SPAN 16
#define MAILBOX_SIMPLE_0_END 0x6f
But i don't know how to use it. In NIOS IDE i have included library altera_avalon_mailbox_simple.h, and in DS-5 i don't have one. Is there any other mailbox librarys i should include in my DS-5 project? Maybe i should map mailboxes as peripherals using same methodology?
void mmap_fpga_peripherals()
{
h2f_lw_axi_master = mmap(NULL, h2f_lw_axi_master_span, PROT_READ | PROT_WRITE, MAP_SHARED, fd_dev_mem, h2f_lw_axi_master_ofst);
if(h2f_lw_axi_master == MAP_FAILED)
{
printf("ERROR: h2f_lw_axi_master mmap() failed.\n");
printf(" errno = %s\n", strerror(errno));
close(fd_dev_mem);
exit(EXIT_FAILURE);
}
fpga_buttons = h2f_lw_axi_master + BUTTONS_0_BASE;
fpga_hex_displays[0] = h2f_lw_axi_master + HEX_0_BASE;
fpga_hex_displays[1] = h2f_lw_axi_master + HEX_1_BASE;
fpga_hex_displays[2] = h2f_lw_axi_master + HEX_2_BASE;
fpga_hex_displays[3] = h2f_lw_axi_master + HEX_3_BASE;
fpga_hex_displays[4] = h2f_lw_axi_master + HEX_4_BASE;
fpga_hex_displays[5] = h2f_lw_axi_master + HEX_5_BASE;
}
But I don't think I should use mmap_fpga_peripherals()
to map mailboxes. I'm not sure.
You should also generate device tree binary by sopc2dts which is usually under path intelFPGA/xxx/embedded/host_tools/altera/device_tree. Then write Linux drivers on basis of the mailbox device. For detailed information please refer to specs in Linux project.