CLKCTRL in a shift register

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I'm having a problem in Quartus II v13 with a simple circular shift register. When I look at the logic with the RTL Viewer it is correct, but the circuit does not function correctly on the dev board. When I look at the Technology Map Viewer (Post-Fitting) I see that the clock only goes to stage zero of the shift register, the remaining stages are fed by the same clock via a CLKCTRL block. Sometimes re-arranging the circuit removes this block and then the circuit then functions correctly. What am I doing wrong?

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