I wrote a simple printf C code and made a simple makefile. When I run make with CFLAGS, CPPFLAGS and LDFLAGS, the values of the variables goes into a cc execution, followed by a gcc execution without those values, like this:
$ CFLAGS="-I." CPPFLAGS="-D TESTEDEFINE" CXXFLAGS="TESTECXXFLAGS" LDFLAGS="-L." LFLAGS="TESTELFLAGS" make
cc -I. -D TESTEDEFINE -L. teste.c -o teste
gcc -o teste teste.c
When I run the built program, the define isn't defined since it gives me the printf of the not defined #else.
teste.c
#include <stdio.h>
int main()
{
#if defined(TESTEDEFINE)
printf("TESTEDEFINE!!!");
#else
printf("!!!");
#endif
return 0;
}
Makefile
all: teste
gcc -o teste teste.c
The variables are for consistency, readability, and ease of use. Neither your compile nor your makefile reference them. The compiler does not automatically reference those variables.
Try this instead:
You would also need to define them in your makefile and reference them in the compiler line.