Carry bit of addition in IJVM

Question

The IADD instruction in IJVM adds two 1-word numbers. When I add EEEEEEEE to itself I get DDDDDDDC. What happens to the carry 1? How can I get it? Is it saved in a register?

Answer 1

It appears that the carry-out bit is lost.

No version of the IJVM Assembly Language Specification that I've come across says anything about a carry-out bit, or carry flag.

IADD    Pop two words from stack; push their sum

downeyt adds:

The MIC1 that interprets IJVM only has two condition codes, N and Z. The carry out from the ALU is not stored. The microarchitecture could be modified to store the carry out, like it stores the N and Z bits.