Suppose you have two chips - for concreteness, say a CPU and a video chip - both of which want to access memory at the maximum bandwidth of which the memory is capable. Say each video frame is X bytes, the CPU wants to write X bytes to generate the next frame, the video chip wants to read X bytes to display the current frame and the memory has maximum bandwidth 60X bytes per second so it can handle either the read requests or the write requests but not both.
Is it possible to have two memory banks, each X bytes in size and each capable of 60X bytes per second, such that on even frames the CPU writes to the first bank and the video chip reads from the second bank, and on odd frames vice versa?