I'm implementing a hypervisor on ARM and I need to know if there's a way to resume (ERET) the guest and trap after a single instruction execution, without depending on the debug architecture (v7.1). I could use a software approach by modifying the next instruction of the guest to a HVC (equivalent of VMCALL on Intel), but I don't know how to handle instructions that cause branching (JMP).
On Intel I could use either the trap flag (=TF bit in RFLAGS, per-OS-thread-context) or the monitor trap flag (=MTF, VT-x feature).
Thank you
EDIT: Clarifications
- I want to avoid disassembly/emulation (as much as possible)