4 hall sensor with TLA2518 converter through Arduino Uno

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I am working on my master's thesis using an Arduino Uno, but I am experiencing some difficulties as I am not very experienced with it. Specifically, I have four Hall sensors connected to a TLA2518 converter (SPI), which is in turn connected to the Arduino Uno using the following pins:

SCL pin 13 SDI pin 12 SDO pin 11 CS pin 10 I have also connected VD to V5 and GND to GND.

I am facing an issue where the readings on the serial monitor are always displaying as zeros when i use a magnet.

I am not sure if my code is correct, or if there is somethong wrong.

#include <SPI.h>
#define CS 10

void setup() {
  // Initialize SPI communication
  SPI.begin();

  // Set the CS pin as an output
  pinMode(CS, OUTPUT);

  // Start serial communication
  Serial.begin(9600);
}

void loop() {
  // Select the first sensor
  digitalWrite(CS, LOW);

  // Send a command to read from the TLA2518
  SPI.transfer(0b00001111);

  // Read the data from the TLA2518
  int msb = SPI.transfer(0x00);
  int lsb = SPI.transfer(0x00);
  int data = (msb << 8) | lsb;

  // Deselect the TLA2518 converter
  digitalWrite(CS, HIGH);

  // Print the data to the serial monitor
  Serial.println("Sensor 1: " + String(data));

  // Select the second sensor
  digitalWrite(CS, LOW);

  // Send a command to read from the TLA2518
  SPI.transfer(0b00011111);

  // Read the data from the TLA2518
  msb = SPI.transfer(0x00);
  lsb = SPI.transfer(0x00);
  data = (msb << 8) | lsb;

  // Deselect the TLA2518 converter
  digitalWrite(CS, HIGH);

  // Print the data to the serial monitor
  Serial.println("Sensor 2: " + String(data));

  // Select the third sensor
  digitalWrite(CS, LOW);

  // Send a command to read from the TLA2518
  SPI.transfer(0b00101111);

  // Read the data from the TLA2518
  msb = SPI.transfer(0x00);
  lsb = SPI.transfer(0x00);
  data = (msb << 8) | lsb;

  // Deselect the TLA2518 converter
  digitalWrite(CS, HIGH);

  // Print the data to the serial monitor
  Serial.println("Sensor 3: " + String(data));

  // Select the fourth sensor
  digitalWrite(CS, LOW);

  // Send a command to read from the TLA2518
  SPI.transfer(0b00111111);

  // Read the data from the TLA2518
  msb = SPI.transfer(0x00);
  lsb = SPI.transfer(0x00);
  data = (msb << 8) | lsb;

  // Deselect the TLA2518 converter
  digitalWrite(CS, HIGH);

  // Print the data to the serial monitor
  Serial.println("Sensor 4: " + String(data));

  // Wait for a moment before sending another command
  delay(1000);
}

there are link for Converter and hallsensor :

Converter TLA2518 : https://www.ti.com/lit/ds/symlink/tla2518.pdf?ts=1683379708477&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLA2518%253Futm_source%253Dgoogle%2526utm_medium%253Dcpc%2526utm_campaign%253Dasc-dc-null-prodfolderdynamic-cpc-pf-google-eu_int%2526utm_content%253Dprodfolddynamic%2526ds_k%253DDYNAMIC%2BSEARCH%2BADS%2526gclid%253DCj0KCQjw9deiBhC1ARIsAHLjR2CyYxrrXfitS0bWQa4kQoTqoUoEuINzaA3EPdETFFbYqDoPVUafZSkaAm_tEALw_wcB%2526gclsrc%253Daw.ds

Hallsensor: https://www.mouser.de/datasheet/2/187/HWSC_S_A0012826248_1-3073340.pdf 2

The question is: why am I not getting any reaction from my sensor at serialmonitor ?

see the hallsesnor value at serialmonitor

1

There are 1 answers

0
Omar Redwan On

This Answer uses the TLA2528 which exactly is the same as The TLA2518, but the TLA2518 uses SPI and is available in the European Market while the TLA2528 uses I2C and is available in the Chinese Market, but both have the same Registers for reading and resetting the ADC. here is the Code that I wrote in the Arduino IDE.

#include <Wire.h>
#include "tla2528.h"
uint8_t i = 0;
uint16_t returnedValue;
uint8_t returnedRegisterValue;

void ResetADC (void)
{
  Wire.beginTransmission(0b0010000); // Selecting the address of the ADC
  Wire.write(0b00011000); // Sending command for setting a bit 
  Wire.write(GENERAL_CFG_ADDRESS); // Selecting the Register Address we want to change
  Wire.write(CH_RST_MASK); // Sending the Channel Reset Bit Mask to rewrite the register
  Wire.endTransmission();
  Wire.beginTransmission(0b0010000); // Selecting the address of the ADC
  Wire.write(0b00011000); // Sending command for setting a bit 
  Wire.write(GENERAL_CFG_ADDRESS); // Selecting the Register Address we want to change
  Wire.write(RST_MASK); // Sending the Channel Reset Bit Mask to rewrite the register
  Wire.endTransmission();
  Wire.beginTransmission(0b0010000); // Selecting the address of the ADC
  Wire.write(0b00011000); // Sending command for setting a bit 
  Wire.write(GENERAL_CFG_ADDRESS); // Selecting the Register Address we want to change
  Wire.write(RST_COMPLETE); // Sending the Channel Reset Bit Mask to rewrite the register
  Wire.endTransmission();
  Serial.println("Device Selected Channel should have benn reset!");
}

void ReadRegister(uint8_t registerAddress)
{
  Wire.beginTransmission(0b0010000); // Selecting the address of the ADC
  Wire.write(0b00010000); // Sending I2C General Call 
  Wire.write(registerAddress); // Sending Software Reset 
  Wire.endTransmission();
  Wire.requestFrom(0b0010000,1);
  returnedRegisterValue = Wire.read();
}

void SetChannelInRegister(uint8_t bitMask)
{
  Wire.beginTransmission(0b0010000); // Selecting the address of the ADC
  Wire.write(0b00011000); // Sending command for setting a bit 
  Wire.write(MANUAL_CH_SEL_ADDRESS); // Selecting the Register Address we want to change
  Wire.write(bitMask); // Sending the bit Mask to rewrite the register
  Wire.endTransmission();
}

void readAnalogIn(uint8_t bitMask)
{
  SetChannelInRegister(bitMask);
  Wire.requestFrom(0b0010000,2);
  returnedValue = Wire.read() << 8 | Wire.read();
  returnedValue = returnedValue >> 4;
}


void setup() {
  // put your setup code here, to run once:
  Serial.begin(9600);
  Wire.setClock(400000); // Setting the CLock for the I2C Transmission
  Wire.begin();
  delay(250);
}

void loop() 
{
  ResetADC();
  delay(500);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  readAnalogIn(MANUAL_CHID_AIN1);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 1:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN2);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 2:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN3);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 3:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN4);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 4:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN5);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 5:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN6);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 6:\t");
  Serial.println(returnedValue);
  delay(2000);
  ResetADC();
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  delay(500);
  readAnalogIn(MANUAL_CHID_AIN7);
  ReadRegister(MANUAL_CH_SEL_ADDRESS);
  Serial.print("Measured Register Value :\t");
  Serial.println(returnedRegisterValue);
  Serial.print("Measured Value Channel 7:\t");
  Serial.println(returnedValue);
  delay(3000);
}

This was the first version that I used to test the logic and make sure that I am doing everything right! that's why you see me reading the MANUAL_CH_SEL Register to make sure that it selects the right channel.

The Code uses the Manual Mode to read each of the Channels, but the trick to make sure that it is working is to actually reset the ADC before every time you want to read from a new Channel!!

This ADC always works in a 2 frames configuration, whether it is to read the Registers, write them, read data.

  • For example, for writing in a register you have to send a command of 8 bits (00001000b), then another 8 bits for the address of the Register and then 8 bits to write the ADC.

I am gonna also add the c header file tla2528.c that you can find in the Texas Instruments Website. This file is written and published by them and I just used it for the addresses of the Registers.

/*
 * @file tla2528.h
 *
 * @brief TLA2528 Descriptor
 *
 * @copyright Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
 *
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef TLA2528_H_
#define TLA2528_H_

#include <stdint.h>


//**********************************************************************************
//
// Function prototypes
//
//**********************************************************************************



//**********************************************************************************
//
// Device commands
//
//**********************************************************************************



//**********************************************************************************
//
// Register definitions
//
//**********************************************************************************


/* Register 0x00 (SYSTEM_STATUS) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     RSVD     |  SEQ_STATUS  |   I2C_SPEED  |   RESERVED   |   OSR_DONE   | CRC_ERR_FUSE |  CRC_ERR_IN  |      BOR     |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* SYSTEM_STATUS register */
    #define SYSTEM_STATUS_ADDRESS                      ((uint8_t) 0x00)
    #define SYSTEM_STATUS_DEFAULT                     ((uint8_t) 0x81)

    /* SEQ_STATUS field */
    #define SEQ_STATUS_MASK                         ((uint8_t) 0x40)
    #define SEQ_STATUS_STOPPED                        ((uint8_t) 0x00)    // DEFAULT
    #define SEQ_STATUS_RUNNING                        ((uint8_t) 0x40)

    /* I2C_SPEED field */
    #define I2C_SPEED_MASK                          ((uint8_t) 0x20)
    #define I2C_SPEED_NORMAL                        ((uint8_t) 0x00)    // DEFAULT
    #define I2C_SPEED_HIGH                          ((uint8_t) 0x20)

    /* OSR_DONE field */
    #define OSR_DONE_MASK                         ((uint8_t) 0x08)
    #define OSR_DONE_WAITING                        ((uint8_t) 0x00)    // DEFAULT
    #define OSR_DONE_COMPLETE                       ((uint8_t) 0x08)

    /* CRC_ERR_FUSE field */
    #define CRC_ERR_FUSE_MASK                       ((uint8_t) 0x04)
    #define CRC_ERR_FUSE_OKAY                       ((uint8_t) 0x00)    // DEFAULT
    #define CRC_ERR_FUSE_ERROR                        ((uint8_t) 0x04)

    /* CRC_ERR_IN field */
    #define CRC_ERR_IN_MASK                         ((uint8_t) 0x02)
    #define CRC_ERR_IN_OKAY                         ((uint8_t) 0x00)    // DEFAULT
    #define CRC_ERR_IN_ERROR                        ((uint8_t) 0x02)

    /* BOR field */
    #define BOR_MASK                            ((uint8_t) 0x01)
    #define BOR_OKAY                            ((uint8_t) 0x00)
    #define BOR_ERROR                           ((uint8_t) 0x01)    // DEFAULT



/* Register 0x01 (GENERAL_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                       RESERVED[3:0]                       |     CNVST    |    CH_RST    |      CAL     |      RST     |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* GENERAL_CFG register */
    #define GENERAL_CFG_ADDRESS                       ((uint8_t) 0x01)
    #define GENERAL_CFG_DEFAULT                       ((uint8_t) 0x00)

    /* CNVST field */
    #define CNVST_MASK                            ((uint8_t) 0x08)
    #define CNVST_NORMAL_SCL_STRETCHED                    ((uint8_t) 0x00)    // DEFAULT
    #define CNVST_START_NO_STRETCH                      ((uint8_t) 0x08)

    /* CH_RST field */
    #define CH_RST_MASK                           ((uint8_t) 0x04)
    #define CH_RST_NORMAL                         ((uint8_t) 0x00)    // DEFAULT
    #define CH_RST_FORCE_AIN                        ((uint8_t) 0x04)

    /* CAL field */
    #define CAL_MASK                            ((uint8_t) 0x02)
    #define CAL_COMPLETE                          ((uint8_t) 0x00)    // DEFAULT
    #define CAL_START                           ((uint8_t) 0x02)

    /* RST field */
    #define RST_MASK                            ((uint8_t) 0x01)
    #define RST_COMPLETE                          ((uint8_t) 0x00)    // DEFAULT
    #define RST_START                           ((uint8_t) 0x01)



/* Register 0x02 (DATA_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |    FIX_PAT   |   RESERVED   |      APPEND_STATUS[1:0]     |                       RESERVED[3:0]                       |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* DATA_CFG register */
    #define DATA_CFG_ADDRESS                        ((uint8_t) 0x02)
    #define DATA_CFG_DEFAULT                        ((uint8_t) 0x00)

    /* FIX_PAT field */
    #define FIX_PAT_MASK                          ((uint8_t) 0x80)
    #define FIX_PAT_NORMAL                          ((uint8_t) 0x00)    // DEFAULT
    #define FIX_PAT_ENABLE                          ((uint8_t) 0x80)

    /* APPEND_STATUS field */
    #define APPEND_STATUS_MASK                        ((uint8_t) 0x30)
    #define APPEND_STATUS_DISABLE                     ((uint8_t) 0x00)    // DEFAULT
    #define APPEND_STATUS_ID                        ((uint8_t) 0x10)
    #define APPEND_STATUS_ONLY                        ((uint8_t) 0x20)



/* Register 0x03 (OSR_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                               RESERVED[4:0]                              |                  OSR[2:0]                  |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* OSR_CFG register */
    #define OSR_CFG_ADDRESS                         ((uint8_t) 0x03)
    #define OSR_CFG_DEFAULT                         ((uint8_t) 0x00)

    /* OSR field */
    #define OSR_MASK                            ((uint8_t) 0x07)
    #define OSR_1                             ((uint8_t) 0x00)    // DEFAULT
    #define OSR_2                             ((uint8_t) 0x01)
    #define OSR_4                             ((uint8_t) 0x02)
    #define OSR_8                             ((uint8_t) 0x03)
    #define OSR_16                              ((uint8_t) 0x04)
    #define OSR_32                              ((uint8_t) 0x05)
    #define OSR_64                              ((uint8_t) 0x06)
    #define OSR_128                             ((uint8_t) 0x07)



/* Register 0x04 (OPMODE_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                RESERVED[2:0]               |    OSC_SEL   |                        CLK_DIV[3:0]                       |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* OPMODE_CFG register */
    #define OPMODE_CFG_ADDRESS                        ((uint8_t) 0x04)
    #define OPMODE_CFG_DEFAULT                        ((uint8_t) 0x00)

    /* OSC_SEL field */
    #define OSC_SEL_MASK                          ((uint8_t) 0x10)
    #define OSC_SEL_HIGH_SPEED                        ((uint8_t) 0x00)    // DEFAULT
    #define OSC_SEL_LOW_POWER                       ((uint8_t) 0x10)



/* Register 0x05 (PIN_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                      PIN_CFG[7:0]                                                     |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* PIN_CFG register */
    #define PIN_CFG_ADDRESS                         ((uint8_t) 0x05)
    #define PIN_CFG_DEFAULT                         ((uint8_t) 0x00)

    /* PIN_CFG field */
    #define PIN_CFG_MASK                          ((uint8_t) 0xFF)
    #define PIN_CFG_AIN0                          ((uint8_t) 0x01)
    #define PIN_CFG_AIN1                          ((uint8_t) 0x02)
    #define PIN_CFG_AIN2                          ((uint8_t) 0x04)
    #define PIN_CFG_AIN3                          ((uint8_t) 0x08)
    #define PIN_CFG_AIN4                          ((uint8_t) 0x10)
    #define PIN_CFG_AIN5                          ((uint8_t) 0x20)
    #define PIN_CFG_AIN6                          ((uint8_t) 0x40)
    #define PIN_CFG_AIN7                          ((uint8_t) 0x80)



/* Register 0x07 (GPIO_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                     GPIO_CFG[7:0]                                                     |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* GPIO_CFG register */
    #define GPIO_CFG_ADDRESS                        ((uint8_t) 0x07)
    #define GPIO_CFG_DEFAULT                        ((uint8_t) 0x00)

    /* GPIO_CFG field */
    #define GPIO_CFG_MASK                         ((uint8_t) 0xFF)
    #define GPIO_CFG_GPO0                         ((uint8_t) 0x01)
    #define GPIO_CFG_GPO1                         ((uint8_t) 0x02)
    #define GPIO_CFG_GPO2                         ((uint8_t) 0x04)
    #define GPIO_CFG_GPO3                         ((uint8_t) 0x08)
    #define GPIO_CFG_GPO4                         ((uint8_t) 0x10)
    #define GPIO_CFG_GPO5                         ((uint8_t) 0x20)
    #define GPIO_CFG_GPO6                         ((uint8_t) 0x40)
    #define GPIO_CFG_GPO7                         ((uint8_t) 0x80)



/* Register 0x09 (GPO_DRIVE_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                   GPO_DRIVE_CFG[7:0]                                                  |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* GPO_DRIVE_CFG register */
    #define GPO_DRIVE_CFG_ADDRESS                     ((uint8_t) 0x09)
    #define GPO_DRIVE_CFG_DEFAULT                     ((uint8_t) 0x00)

    /* GPO_DRIVE_CFG field */
    #define GPO_DRIVE_CFG_MASK                        ((uint8_t) 0xFF)
    #define GPO_DRIVE_CFG_GPO0                        ((uint8_t) 0x01)
    #define GPO_DRIVE_CFG_GPO1                        ((uint8_t) 0x02)
    #define GPO_DRIVE_CFG_GPO2                        ((uint8_t) 0x04)
    #define GPO_DRIVE_CFG_GPO3                        ((uint8_t) 0x08)
    #define GPO_DRIVE_CFG_GPO4                        ((uint8_t) 0x10)
    #define GPO_DRIVE_CFG_GPO5                        ((uint8_t) 0x20)
    #define GPO_DRIVE_CFG_GPO6                        ((uint8_t) 0x40)
    #define GPO_DRIVE_CFG_GPO7                        ((uint8_t) 0x80)



/* Register 0x0B (GPO_VALUE) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                     GPO_VALUE[7:0]                                                    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* GPO_VALUE register */
    #define GPO_VALUE_ADDRESS                       ((uint8_t) 0x0B)
    #define GPO_VALUE_DEFAULT                       ((uint8_t) 0x00)

    /* GPO_VALUE field */
    #define GPO_VALUE_MASK                          ((uint8_t) 0xFF)
    #define GPO_VALUE_GPO0_HIGH                       ((uint8_t) 0x01)
    #define GPO_VALUE_GPO1_HIGH                       ((uint8_t) 0x02)
    #define GPO_VALUE_GPO2_HIGH                       ((uint8_t) 0x04)
    #define GPO_VALUE_GPO3_HIGH                       ((uint8_t) 0x08)
    #define GPO_VALUE_GPO4_HIGH                       ((uint8_t) 0x10)
    #define GPO_VALUE_GPO5_HIGH                       ((uint8_t) 0x20)
    #define GPO_VALUE_GPO6_HIGH                       ((uint8_t) 0x40)
    #define GPO_VALUE_GPO7_HIGH                       ((uint8_t) 0x80)



/* Register 0x0D (GPI_VALUE) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                     GPI_VALUE[7:0]                                                    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* GPI_VALUE register */
    #define GPI_VALUE_ADDRESS                       ((uint8_t) 0x0D)
    #define GPI_VALUE_DEFAULT                       ((uint8_t) 0x00)

    /* GPI_VALUE field */
    #define GPI_VALUE_MASK                          ((uint8_t) 0xFF)
    #define GPI_VALUE_GPI0_HIGH                       ((uint8_t) 0x01)
    #define GPI_VALUE_GPI1_HIGH                       ((uint8_t) 0x02)
    #define GPI_VALUE_GPI2_HIGH                       ((uint8_t) 0x04)
    #define GPI_VALUE_GPI3_HIGH                       ((uint8_t) 0x08)
    #define GPI_VALUE_GPI4_HIGH                       ((uint8_t) 0x10)
    #define GPI_VALUE_GPI5_HIGH                       ((uint8_t) 0x20)
    #define GPI_VALUE_GPI6_HIGH                       ((uint8_t) 0x40)
    #define GPI_VALUE_GPI7_HIGH                       ((uint8_t) 0x80)



/* Register 0x10 (SEQUENCE_CFG) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                RESERVED[2:0]               |   SEQ_START  |        RESERVED[1:0]        |        SEQ_MODE[1:0]        |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* SEQUENCE_CFG register */
    #define SEQUENCE_CFG_ADDRESS                      ((uint8_t) 0x10)
    #define SEQUENCE_CFG_DEFAULT                      ((uint8_t) 0x00)

    /* SEQ_START field */
    #define SEQ_START_MASK                          ((uint8_t) 0x10)
    #define SEQ_START_END                         ((uint8_t) 0x00)    // DEFAULT
    #define SEQ_START_ASSEND                        ((uint8_t) 0x10)

    /* SEQ_MODE field */
    #define SEQ_MODE_MASK                         ((uint8_t) 0x03)
    #define SEQ_MODE_MANUAL                         ((uint8_t) 0x00)    // DEFAULT
    #define SEQ_MODE_AUTO                         ((uint8_t) 0x01)



/* Register 0x11 (MANUAL_CH_SEL) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                       RESERVED[3:0]                       |                      MANUAL_CHID[3:0]                     |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* MANUAL_CH_SEL register */
    #define MANUAL_CH_SEL_ADDRESS                     ((uint8_t) 0x11)
    #define MANUAL_CH_SEL_DEFAULT                     ((uint8_t) 0x00)

    /* MANUAL_CHID field */
    #define MANUAL_CHID_MASK                        ((uint8_t) 0x0F)
    #define MANUAL_CHID_AIN0                        ((uint8_t) 0x00)    // DEFAULT
    #define MANUAL_CHID_AIN1                        ((uint8_t) 0x01)
    #define MANUAL_CHID_AIN2                        ((uint8_t) 0x02)
    #define MANUAL_CHID_AIN3                        ((uint8_t) 0x03)
    #define MANUAL_CHID_AIN4                        ((uint8_t) 0x04)
    #define MANUAL_CHID_AIN5                        ((uint8_t) 0x05)
    #define MANUAL_CHID_AIN6                        ((uint8_t) 0x06)
    #define MANUAL_CHID_AIN7                        ((uint8_t) 0x07)



/* Register 0x12 (AUTO_SEQ_CH_SEL) definition
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |     Bit 7    |     Bit 6    |     Bit 5    |     Bit 4    |     Bit 3    |     Bit 2    |     Bit 1    |     Bit 0    |
 * |-----------------------------------------------------------------------------------------------------------------------|
 * |                                                  AUTO_SEQ_CH_SEL[7:0]                                                 |
 * |-----------------------------------------------------------------------------------------------------------------------|
 */

    /* AUTO_SEQ_CH_SEL register */
    #define AUTO_SEQ_CH_SEL_ADDRESS                     ((uint8_t) 0x12)
    #define AUTO_SEQ_CH_SEL_DEFAULT                     ((uint8_t) 0x00)

    /* AUTO_SEQ_CH_SEL field */
    #define AUTO_SEQ_CH_SEL_MASK                      ((uint8_t) 0xFF)
    #define AUTO_SEQ_CH_SEL_AIN0                      ((uint8_t) 0x01)
    #define AUTO_SEQ_CH_SEL_AIN1                      ((uint8_t) 0x02)
    #define AUTO_SEQ_CH_SEL_AIN2                      ((uint8_t) 0x04)
    #define AUTO_SEQ_CH_SEL_AIN3                      ((uint8_t) 0x08)
    #define AUTO_SEQ_CH_SEL_AIN4                      ((uint8_t) 0x10)
    #define AUTO_SEQ_CH_SEL_AIN5                      ((uint8_t) 0x20)
    #define AUTO_SEQ_CH_SEL_AIN6                      ((uint8_t) 0x40)
    #define AUTO_SEQ_CH_SEL_AIN7                      ((uint8_t) 0x80)

  //Added by David Lyckelid
    #define ALERT_PIN_CFG                             ((uint8_t) 0x17)

#endif /* TLA2528_H_ */