List Question
20 TechQA 2024-03-31T19:54:05.357000Unexpected inter-thread happens-before relationships from relaxed memory ordering
63 views
Asked by Othan4
Prevent reordering of prefetch instruction in c++
87 views
Asked by Akash
About memory barrier
51 views
Asked by magicsun
How CPUs Use the LOCK Prefix to Implement Cache Locking and ensure memory consistency
128 views
Asked by Triassic
memory order with multiple stores
93 views
Asked by Roman
Is fail ordering relevant for x86 atomic operation?
116 views
Asked by Some Name
Why std::mutex of c++11 has no memory order?
112 views
Asked by Harlan Chen
Why does a load-load control dependency require a full read memory barrier
81 views
Asked by Bob
Is it guaranteed, that read-modify-write operation reads (and returns) a correct old value on weak memory models?
109 views
Asked by blonded04
Why does std::memory_order_acq_rel always trigger warnings in C++11?
86 views
Asked by xmllmx
How does this acquire-release relationship work?
86 views
Asked by Samuel Yvon
Relaxed ordering modern C++
70 views
Asked by getsoubl
Linux kernel memory model pointer access and dereference
139 views
Asked by Darnoc Eloc
bounded lock free mcsc queue read invalid value
27 views
Asked by Alex
memory_order: acquire/release reversed pattern
114 views
Asked by TruLa
acquire/release memory order on different processors
78 views
Asked by Steve Zhang
How `memory_order_relaxed` is enough in TTAS spinlock for Arm64?
181 views
Asked by blonded04
Invalidation of an Exclusive cache line
128 views
Asked by klezki
In the implemention of urcu-qsbr, is there any mechanism to ensure the thread offline/online is visible to writer-thread?
73 views
Asked by Zhipeng Teng
what does the _mm_mfence() function do
173 views
Asked by koiboi