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20 TechQA 2017-01-06T07:57:38.940000How to generate random numbers in FPGA for use as IV in cryptographic applications
370 views
Asked by Kaka
Writing to an unformatted, direct access binary file in C
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Asked by Davigor
How do I build a 5-bit maximal-length Galois LFSR in Verilog?
1.2k views
Asked by Timothy Calvert
Fibonacci LFSR using the Altera Megafunction LPM_SHIFTREG - how to initialise? [VHDL]
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Asked by Fish4November
Linear feedback shift register is not even distrubtion
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Asked by xc3s50an
Linear-feedback shift register implementation
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Asked by Rico1990
VHDL-Implement LFSR
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Asked by Sokhan Negar
Bitwise calculation of an LFSR sequence using CRC-style notation
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Asked by davidhood2
How exactly were all the round constants for SHA-3 generated?
785 views
Asked by lyrically wicked
Berlekamp-Massey minimal LFSR issues
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Asked by Leo
random number using LFSR
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Asked by kuma DK
LFSR doesn't generate random values during simulation
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Asked by hrsd
trying to make an lfsr in js
219 views
Asked by Gidon Avziz
32-Bit LFSR Encryption on a String in C++
651 views
Asked by Cameron Calderon
Verilog: assign a weighted sum of parameterized length
220 views
Asked by Jersey
Is it possible to reverse the sequence of an LFSR if the GF(2) tap polynomial has the x^0 term set to zero?
172 views
Asked by cookiecipher
Reverse engineering checksum calculation for Proflame 2 RF remote
138 views
Asked by Felix
Efficient Calculation of Linear Feedback Shift Register Iterations
176 views
Asked by Router
Why does the sum of two adjacent sections of bitstream in an LFSR generate the same taps as the individual sections?
79 views
Asked by Layan Jethwa