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Triggering L2 cache write to global memory on AMD GCN architecture using OpenCL

score 463 · Answer 1 · 2015-06-25 15:51:54

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Triggering L2 cache write to global memory on AMD GCN architecture using OpenCL

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TechQA.

List Question

Triggering L2 cache write to global memory on AMD GCN architecture using OpenCL

Avoid L1 cache pollution on GCN device

Do optimized kernels running on AMD GCN OpenCL only work with ~1024 bytes at a time?

OpenCL (AMD GCN) global memory access pattern for vectorized data: strided vs. contiguous

Performance drop in matrix multiplication for certain sizes on AMD Polaris

SIMD-16 and SIMD-32 advantage/disadvantage?

What is the best practice for memory access in this N-body problem solved on AMD Radeon RX580?

V_SUB_F64 in AMD's GCN and VEGA instruction set

OpenCL and AMD GPU Architecture understanding

How to resolve _pickle.UnpicklingError

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